时钟配置之前
[mw_shl_code=applescript,true]sysclk=HAL_RCC_GetHCLKFreq();
pclk1=HAL_RCC_GetPCLK1Freq();
pclk2=HAL_RCC_GetPCLK1Freq();
BSP_SystemClkCfg(); /* Initialize CPU clock frequency to 216Mhz */
sysclk=HAL_RCC_GetHCLKFreq();
pclk1=HAL_RCC_GetPCLK1Freq();
pclk2=HAL_RCC_GetPCLK1Freq();[/mw_shl_code]
时钟配置之后
时钟配置代码
[mw_shl_code=applescript,true]void BSP_SystemClkCfg (void)
{
RCC_OscInitTypeDef RCC_OscInit;
RCC_ClkInitTypeDef RCC_ClkInit;
HAL_StatusTypeDef hal_status;
__HAL_RCC_PWR_CLK_ENABLE(); //使能PWR时钟
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);//设置调压器输出电压级别,以便在器件未以最大频率工作
/* VCO out-freq = HSE * (PLLN / PLLM) = 432MHz. */
/* PLLCLK = (VCO out-freq) / PLLP = 216MHz. */
RCC_OscInit.OscillatorType = RCC_OSCILLATORTYPE_HSE; /* HSE freq = 25MHz. */
RCC_OscInit.HSEState = RCC_HSE_ON;
RCC_OscInit.HSIState = RCC_HSI_OFF;
RCC_OscInit.PLL.PLLState = RCC_PLL_ON;
RCC_OscInit.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInit.PLL.PLLM = 25u;
RCC_OscInit.PLL.PLLN = 432u;
RCC_OscInit.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInit.PLL.PLLQ = 9;/* PLL_Q out freq = (VCO out-freq) / PLLQ = 48MHz. */
RCC_OscInit.PLL.PLLR = 7;
hal_status = HAL_RCC_OscConfig(&RCC_OscInit);
if (hal_status != HAL_OK) {
while (DEF_TRUE) { /* STOP if error */
;
}
}
hal_status = HAL_PWREx_EnableOverDrive(); /* Activate the OverDrive to reach the 216 Mhz Freq */
if (hal_status != HAL_OK) {
while (DEF_TRUE) { /* STOP if error */
;
}
}
RCC_ClkInit.ClockType = RCC_CLOCKTYPE_SYSCLK |
RCC_CLOCKTYPE_HCLK |
RCC_CLOCKTYPE_PCLK1 |
RCC_CLOCKTYPE_PCLK2;
RCC_ClkInit.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInit.AHBCLKDivider = RCC_SYSCLK_DIV1; /* HCLK = AHBCLK = PLLCLK / AHBPRES(1) = 216MHz. */
RCC_ClkInit.APB1CLKDivider = RCC_HCLK_DIV4; /* APB1CLK = AHBCLK / APB1DIV(4) = 54MHz. */
RCC_ClkInit.APB2CLKDivider = RCC_HCLK_DIV2; /* APB2CLK = AHBCLK / APB2DIV(2) = 108MHz. */
hal_status = HAL_RCC_ClockConfig(&RCC_ClkInit, FLASH_LATENCY_7);
if (hal_status != HAL_OK) {
while (DEF_TRUE) { /* STOP if error */
;
}
}
}
[/mw_shl_code]
ucosiii官方的时钟配置代码。明显配置的时钟和输出的时钟不一样啊???这是什么原因呢?
[mw_shl_code=applescript,true]void SystemCoreClockUpdate(void)
{
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* HSI used as system clock source */
SystemCoreClock = HSI_VALUE;
break;
case 0x04: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE;
break;
case 0x08: /* PLL used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
SYSCLK = PLL_VCO / PLL_P
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
if (pllsource != 0)
{
/* HSE used as PLL clock source */
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}
else
{
/* HSI used as PLL clock source */
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
SystemCoreClock = pllvco/pllp;
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK frequency --------------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK frequency */
SystemCoreClock >>= tmp;
}[/mw_shl_code]
上述是system_stm32f7xx.c文件中的SystemCoreClockUpdate函数。
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