使用STM32F407的TIM2定时器,使用内部时钟APB1,不分频(晶振25MHz),AHB也不分频,SYSCLK为25MHz,故APB1的时钟为25MHz,作为CK_INT,
由于禁止从模式,所以CK_PSC=CK_INT,设置PSC预分频器为24999,即分频25000,得到的CK_CNT为1KHz,设置技术CNT及自动重载寄存器为1000,向下递减模式,按理说应该1s产生一次中断,但实际上是2s产生一次中断。很郁闷啊……
[mw_shl_code=c,true]#include<stm32f4xx.h>
/*
定时器中断
SYSCLK:HSE---25MHz
PE2
utput
*/
int flag=0;
/*
configuration system clock
SYSCLK---HSE---25MHz
AHB not divided APB1 AND APB2 not divided
AHB:25MHz APB1:25MHz
*/
void config_clock()
{
RCC->CR |= RCC_CR_HSEON; //HSE oscillator ON
while((RCC->CR & RCC_CR_HSERDY) != RCC_CR_HSERDY) //HSE oscillator ready
;
RCC->CFGR &= ~RCC_CFGR_PPRE1; //reset PPRE1(APB1 PRESC)
RCC->CFGR |= RCC_CFGR_PPRE1_DIV1; //HCLK not divided
RCC->CFGR &= ~RCC_CFGR_SW; //reset SW register
RCC->CFGR |= RCC_CFGR_SW_0; //select HSE as SYSCLK
RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2
RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST; //don't reset TIM2
RCC->AHB1RSTR |= RCC_AHB1RSTR_GPIOERST; //reset GPIOE
RCC->AHB1RSTR &=~RCC_AHB1RSTR_GPIOERST; //don't reset GPIOE
RCC->AHB1RSTR |= RCC_AHB1RSTR_GPIOCRST; //reset GPIOC
RCC->AHB1RSTR &= ~RCC_AHB1RSTR_GPIOCRST; //don't reset GPIOC
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN; //enable GPIOE clock
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; //enable TIM2 clock
}
/*
configuration GPIOs
PE2 as output
*/
void config_GPIOs()
{
GPIOE->ODR |= GPIO_ODR_ODR_2; //set output data register 1
GPIOE->MODER |= GPIO_MODER_MODER2_0; //set PE2 as output mode
}
/*
configuration TIM2
*/
void config_TIM2()
{
TIM2->CR1 &= ~TIM_CR1_ARPE; //TIM2_ARR register is buffered
TIM2->CR1 &= ~TIM_CR1_CMS; //Edge-aligned mode
TIM2->CR1 |= TIM_CR1_DIR; //counter used as downcounter
TIM2->CR1 |= TIM_CR1_URS; //only counter overflow/underflow-->interrupt/DMA request
//TIM2->CR1 &= ~TIM_CR1_UDIS; //enable update
TIM2->SMCR &= ~TIM_SMCR_SMS; //slave mode disabled use internal clock
TIM2->CNT = 500;
TIM2->
SC = 24999; //Prescaler value(CK_CNT:0.5KHz)
TIM2->ARR = 500; //auto-reload register
TIM2->EGR |= TIM_EGR_UG;
TIM2->SR &= ~TIM_SR_UIF;
TIM2->DIER |= TIM_DIER_UIE; //Update interrupt enable
TIM2->CR1 |= TIM_CR1_CEN; //counter enable
}
void main()
{
config_clock();
config_GPIOs();
NVIC_EnableIRQ(TIM2_IRQn);
NVIC_SetPriority(TIM2_IRQn,5);
config_TIM2();
while(1)
{
}
}
void TIM2_IRQHandler()
{
TIM2->SR &= ~TIM_SR_UIF; //clear interrupt flag
if(flag)
{
GPIOE->ODR &= ~GPIO_ODR_ODR_2;
flag=0;
}
else
{
GPIOE->ODR |= GPIO_ODR_ODR_2;
flag=1;
}
}
[/mw_shl_code]
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