定时器的主从模式----参照官方库函数修改为寄存器版-sanv的回答

定时器的主从模式----参照官方库函数修改为寄存器版

2019-07-21 02:46发布

定时器的主从模式---参照官方库函数修改为寄存器版；
如果有人用到定时器器主从模式的寄存器版，在这基础上修改修改，可能会节省点时间。

官方库函数（主定时器：TIM2；从定时器：TIM3、TIM4）：
00001 /** 00002 ****************************************************************************** 00003 * @file TIM/Parallel_Synchro/main.c 00004 * @author MCD Application Team 00005 * @version V3.1.0 00006 * @date 06/19/2009 00007 * @brief Main program body 00008 ****************************************************************************** 00009 * @copy 00010 * 00011 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00012 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 00013 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 00014 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 00015 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 00016 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00017 * 00018 * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2> 00019 */ 00020 00021 /* Includes ------------------------------------------------------------------*/ 00022 #include "stm32f10x.h" 00023 00024 /** @addtogroup STM32F10x_StdPeriph_Examples 00025 * @{ 00026 */ 00027 00028 /** @addtogroup TIM_Parallel_Synchro 00029 * @{ 00030 */ 00031 00032 /* Private typedef -----------------------------------------------------------*/ 00033 /* Private define ------------------------------------------------------------*/ 00034 /* Private macro -------------------------------------------------------------*/ 00035 /* Private variables ---------------------------------------------------------*/ 00036 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; 00037 TIM_OCInitTypeDef TIM_OCInitStructure; 00038 00039 /* Private function prototypes -----------------------------------------------*/ 00040 void RCC_Configuration(void); 00041 void GPIO_Configuration(void); 00042 00043 /* Private functions ---------------------------------------------------------*/ 00044 00045 /** 00046 * @brief Main program 00047 * @param None 00048 * @retval None 00049 */ 00050 int main(void) 00051 { 00052 /* System Clocks Configuration */ 00053 RCC_Configuration(); 00054 00055 /* GPIO Configuration */ 00056 GPIO_Configuration(); 00057 00058 /* Timers synchronisation in parallel mode ---------------------------- 00059 1/TIM2 is configured as Master Timer: 00060 - PWM Mode is used 00061 - The TIM2 Update event is used as Trigger Output 00062 2/TIM3 and TIM4 are slaves for TIM2, 00063 - PWM Mode is used 00064 - The ITR1(TIM2) is used as input trigger for both slaves 00065 - Gated mode is used, so starts and stops of slaves counters 00066 are controlled by the Master trigger output signal(update event). 00067 00068 The TIMxCLK is fixed to 72 MHz, the TIM2 counter clock is 72 MHz. 00069 The Master Timer TIM2 is running at 281.250 KHz and the duty cycle 00070 is equal to 25% 00071 The TIM3 is running: 00072 - At (TIM2 frequency)/ (TIM3 period + 1) = 28.125 KHz and a duty cycle 00073 equal to TIM3_CCR1/(TIM3_ARR + 1) = 30% 00074 The TIM4 is running: 00075 - At (TIM2 frequency)/ (TIM4 period + 1) = 56.250 KHz and a duty cycle 00076 equal to TIM4_CCR1/(TIM4_ARR + 1) = 60% 00077 -------------------------------------------------------------------- */ 00078 00079 /* Time base configuration */ 00080 TIM_TimeBaseStructure.TIM_Period = 255; 00081 TIM_TimeBaseStructure.TIM_Prescaler = 0; 00082 TIM_TimeBaseStructure.TIM_ClockDivision = 0; 00083 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; 00084 00085 TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); 00086 00087 TIM_TimeBaseStructure.TIM_Period = 9; 00088 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); 00089 00090 TIM_TimeBaseStructure.TIM_Period = 4; 00091 TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); 00092 00093 /* Master Configuration in PWM1 Mode */ 00094 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; 00095 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; 00096 TIM_OCInitStructure.TIM_Pulse = 64; 00097 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; 00098 00099 TIM_OC1Init(TIM2, &TIM_OCInitStructure); 00100 00101 /* Select the Master Slave Mode */ 00102 TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable); 00103 00104 /* Master Mode selection */ 00105 TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update); 00106 00107 /* Slaves Configuration: PWM1 Mode */ 00108 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; 00109 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; 00110 TIM_OCInitStructure.TIM_Pulse = 3; 00111 00112 TIM_OC1Init(TIM3, &TIM_OCInitStructure); 00113 00114 TIM_OC1Init(TIM4, &TIM_OCInitStructure); 00115 00116 /* Slave Mode selection: TIM3 */ 00117 TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated); 00118 TIM_SelectInputTrigger(TIM3, TIM_TS_ITR1); 00119 00120 /* Slave Mode selection: TIM4 */ 00121 TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated); 00122 TIM_SelectInputTrigger(TIM4, TIM_TS_ITR1); 00123 00124 /* TIM enable counter */ 00125 TIM_Cmd(TIM3, ENABLE); 00126 TIM_Cmd(TIM2, ENABLE); 00127 TIM_Cmd(TIM4, ENABLE); 00128 00129 while (1) 00130 {} 00131 } 00132 00133 /** 00134 * @brief Configures the different system clocks. 00135 * @param None 00136 * @retval None 00137 */ 00138 void RCC_Configuration(void) 00139 { 00140 /* Setup the microcontroller system. Initialize the Embedded Flash Interface, 00141 initialize the PLL and update the SystemFrequency variable. */ 00142 SystemInit(); 00143 00144 /* TIM2, TIM3 and TIM4 clock enable */ 00145 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | 00146 RCC_APB1Periph_TIM4, ENABLE); 00147 00148 /* GPIOA, GPIOB, GPIOC and AFIO clocks enable */ 00149 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | 00150 RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); 00151 } 00152 00153 /** 00154 * @brief Configure the GPIOD Pins. 00155 * @param None 00156 * @retval None 00157 */ 00158 void GPIO_Configuration(void) 00159 { 00160 GPIO_InitTypeDef GPIO_InitStructure; 00161 00162 #ifdef STM32F10X_CL 00163 /*GPIOB Configuration: PC6(TIM3 CH1) as alternate function push-pull */ 00164 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 ; 00165 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; 00166 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 00167 00168 GPIO_Init(GPIOC, &GPIO_InitStructure); 00169 00170 GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE); 00171 00172 #else 00173 /* GPIOA Configuration: PA6(TIM3 CH1) as alternate function push-pull */ 00174 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; 00175 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; 00176 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 00177 00178 GPIO_Init(GPIOA, &GPIO_InitStructure); 00179 #endif 00180 /* GPIOA Configuration: PA0(TIM2 CH1) as alternate function push-pull */ 00181 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; 00182 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; 00183 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 00184 00185 GPIO_Init(GPIOA, &GPIO_InitStructure); 00186 00187 /* GPIOB Configuration: PB6(TIM4 CH1) as alternate function push-pull */ 00188 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; 00189 00190 GPIO_Init(GPIOB, &GPIO_InitStructure); 00191 } 00192 00193 #ifdef USE_FULL_ASSERT 00194 00195 /** 00196 * @brief Reports the name of the source file and the source line number 00197 * where the assert_param error has occurred. 00198 * @param file: pointer to the source file name 00199 * @param line: assert_param error line source number 00200 * @retval None 00201 */ 00202 void assert_failed(uint8_t* file, uint32_t line) 00203 { 00204 /* User can add his own implementation to report the file name and line number, 00205 ex: printf("Wrong parameters value: file %s on line %d ", file, line) */ 00206 00207 while (1) 00208 {} 00209 } 00210 #endif 00211 00212 /** 00213 * @} 00214 */ 00215 00216 /** 00217 * @} 00218 */ 00219 00220 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ 修改为寄存器版（主定时器：TIM2；从定时器：TIM3，省略了TIM4）：/*从模式：TIM2主模式，TIM3从模式*/[/mw_shl_code]void TIM_Parallel_Synchro(void)[/mw_shl_code]{[/mw_shl_code] /* System Clocks Configuration */[/mw_shl_code] RCC->APB2ENR|=1<<2; //使能PORTA时钟[/mw_shl_code] RCC->APB1ENR|=1<<0; //TIM2时钟使能[/mw_shl_code] RCC->APB1ENR|=1<<1; //TIM3时钟使能[/mw_shl_code] [/mw_shl_code] /* GPIO Configuration */[/mw_shl_code] GPIOA->CRL&=0XFFFFFFF0;//PA0输出[/mw_shl_code] GPIOA->CRL|=0X0000000B;//50Hz，复用功能输出 [/mw_shl_code] GPIOA->ODR|=1<<0; //PA0上拉[/mw_shl_code] [/mw_shl_code] GPIOA->CRL&=0XF0FFFFFF;//PA6输出[/mw_shl_code] GPIOA->CRL|=0X0B000000;//50Hz，复用功能输出 [/mw_shl_code] GPIOA->ODR|=1<<6; //PA6上拉 [/mw_shl_code] /* Time base configuration */[/mw_shl_code] TIM2->ARR=255;//设定计数器自动重装值 [/mw_shl_code] TIM2->

SC=0 ;//预分频器分频[/mw_shl_code] TIM2->CR1 &=~(3<<8);// 选择时钟分频[/mw_shl_code] TIM2->CR1 &=~(3<<5);// 选择计数模式[/mw_shl_code] [/mw_shl_code] TIM3->ARR=9; //设定计数器自动重装值 [/mw_shl_code] TIM3->

SC=0 ; //预分频器分频[/mw_shl_code] TIM3->CR1 &=~(3<<8);// 选择时钟分频[/mw_shl_code] TIM3->CR1 &=~(3<<5);// 选择计数模式[/mw_shl_code] /* Master Configuration in PWM1 Mode */[/mw_shl_code] TIM2->CCMR1|=6<<4; //输出比较模式[/mw_shl_code] TIM2->CCER |=1<<0; //OC1 输出使能[/mw_shl_code] TIM2->CCR1 =64; //捕获比较寄存器（占空比）[/mw_shl_code] TIM2->CCER &=~(1<<1); //OC1 输出极性[/mw_shl_code] [/mw_shl_code] /* Select the Master Slave Mode */[/mw_shl_code] TIM2->SMCR|=1<<7; //选择主从模式[/mw_shl_code] [/mw_shl_code] /* Master Mode selection */[/mw_shl_code] TIM2->CR2 |=2<<4;// 主模式选择[/mw_shl_code] [/mw_shl_code] /* Slaves Configuration: PWM1 Mode */[/mw_shl_code] TIM3->CCMR1|=6<<4; //输出比较模式[/mw_shl_code] TIM3->CCER |=1<<0; //OC1 输出使能[/mw_shl_code] TIM3->CCR1 =3; //捕获比较寄存器（占空比）[/mw_shl_code] TIM3->CCER &=~(1<<1); //OC1 输出极性[/mw_shl_code] [/mw_shl_code] /* Slave Mode selection: TIM3 */[/mw_shl_code] TIM3->SMCR|=5<<0; //从模式选择[/mw_shl_code] TIM3->SMCR|=1<<4; //触发选择[/mw_shl_code] [/mw_shl_code] /* TIM enable counter */ [/mw_shl_code] TIM3->CR1|=0x01; //CEN=1，使能定时器[/mw_shl_code] TIM2->CR1|=0x01; //CEN=1，使能定时器[/mw_shl_code]} 仿真结果：但是仿真结果并不是库函数注释中描述的那样The TIMxCLK is fixed to 72 MHz, the TIM2 counter clock is 72 MHz. The Master Timer TIM2 is running at 281.250 KHz and the duty cycle is equal to 25% The TIM3 is running: - At (TIM2 frequency)/ (TIM3 period + 1) = 28.125 KHz and a duty cycle equal to TIM3_CCR1/(TIM3_ARR + 1) = 30% [/mw_shl_code]