Smart architecture with new peripheral set:

The STM32 F7 series unleashes the new Cortex M7 core:

• AXI and multi-AHB bus matrix for interconnecting Core, peripherals and memories
• Two general purpose DMA controllers and dedicated DMAs for Ethernet, high-speed USB On-The-Go and the Chrom-ART graphic accelerator.
• Peripheral speed independent from CPU speed (dual clock support) allowing system clock changes without impacting the function of the peripherals
• Even more peripherals, such as two serial audio interfaces (SAI) with SPDIF output support, three I2S half-duplex with SPDIF input support,  two USB OTG with dedicated power supply and Dual Quad SPI interface
• 320KBytes of SRAM with scattered architecture:
  • 240 Kbytes of universal data memory
  • a 16 Kbytes partition for sharing data over the bus matrix
  • 64 Kbytes of Tightly-Coupled Data Memory (DTCM) for time critical data handling (stack, heap...)
  • 16 Kbytes of Tightly-Coupled Instruction Memory (ITCM) for time critical routines
  • 4 Kbytes of backup SRAM to keep data in the lowest power modes.

以上从官网找来，新东西都在这了~
如此看来，声卡网卡都省了。