电机给PWM的占空比一般适中上电就会转，占空比较低的时候会初始卡死状态，占空比较高的时候需要手动拨一下才会转，请问什么情况，谢谢！


以下是PWM配置的代码

void Timer1_Init(u16 zkb)
{
TIM_TimeBaseInitTypeDef  TIM_TimeBaseStructure;
TIM_OCInitTypeDef  TIM_OCInitStructure;
TIM_BDTRInitTypeDef TIM_BDTRInitStructure;

PWM_GPIO_Init();   
HALL_GPIO_Init();  
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);

Pwm_period_num=(SystemCoreClock /3600) - 1;   

DC1    = (unsigned short int) (((unsigned long) zkb * (Pwm_period_num   - 1)) / 1000);   
  DC2    = (unsigned short int) (((unsigned long) zkb * (Pwm_period_num   - 1)) / 1000);
  DC3    = (unsigned short int) (((unsigned long) zkb * (Pwm_period_num   - 1)) / 1000);

//³õʼ»¯TIM1
TIM_TimeBaseStructure.TIM_Period = Pwm_period_num;
TIM_TimeBaseStructure.TIM_Prescaler =0;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;  
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);


TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);  


TIM_OC2Init(TIM1, &TIM_OCInitStructure);  

TIM_OC3Init(TIM1, &TIM_OCInitStructure);

TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);  
TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);  
TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);  
TIM_Cmd(TIM1, ENABLE);



TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;         
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = DC1 ;
  TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState  =  TIM_OCIdleState_Set;  
  TIM_OCInitStructure.TIM_OCNIdleState =  TIM_OCNIdleState_Set;
  TIM_OC1Init(TIM1, &TIM_OCInitStructure);

  TIM_OCInitStructure.TIM_Pulse = DC2 ;   
  TIM_OC2Init(TIM1, &TIM_OCInitStructure);

  TIM_OCInitStructure.TIM_Pulse = DC3 ;  
  TIM_OC3Init(TIM1, &TIM_OCInitStructure);
   
   

TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
  TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
  TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;   
  TIM_BDTRInitStructure.TIM_DeadTime = 0x01;                 
  TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;        
  TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
  TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
  TIM_BDTRConfig(TIM1,&TIM_BDTRInitStructure);   
   
               
TIM_CCPreloadControl(TIM1, ENABLE);   
TIM_ITConfig(TIM1, TIM_IT_COM, ENABLE);
TIM_Cmd(TIM1, ENABLE);
  TIM_CtrlPWMOutputs(TIM1, ENABLE);  
}

以下是换相函数
     switch(HALL_Value)   //¸ù¾Ýת×ÓλÖ㬾ö¶¨CCERÊä³öÏàλºÍת×Ó×ÖÆ«ÒÆÁ¿
    {
     case 0x06: //     BA
            /*  Channel2 configuration */
            TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);  //ͨµÀ2²úÉúPWM²¨ÐΠ T3¹Ü×Ó
            TIM_CCxCmd(TIM1, TIM_Channel_2,  TIM_CCx_Enable);      //¿ªÆôͨµÀ2   
            TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);    //¹Ø±ÕͨµÀ2N
   
            /*  Channel1 configuration */
      TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);      //¹Ø±ÕͨµÀ1
      TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);     //¿ªÆôͨµÀ1N   T4
      TIM_ForcedOC1Config(TIM1,TIM_ForcedAction_Active);     //»î¶¯
  
      /*  Channel3 configuration */   
      TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);      //¹Ø±ÕͨµÀ3
      TIM_CCxNCmd(TIM1, TIM_Channel_3,TIM_CCxN_Enable);      //¿ªÆôͨµÀ3N  
      TIM_ForcedOC3Config(TIM1,TIM_ForcedAction_InActive);   //²»»î¶¯
        
        TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
  


         break;
     case 0x04: //      CA
        /*  Channel3 configuration */
        TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);  //ͨµÀ3²úÉúPWM²¨ÐΠ T5¹Ü×Ó
      TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
      TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
  
      /*  Channel1 configuration */
      TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
      TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);     //  T4
      TIM_ForcedOC1Config(TIM1,TIM_ForcedAction_Active);
      /*  Channel2 configuration */
      TIM_CCxCmd(TIM1, TIM_Channel_2,  TIM_CCx_Disable);
      TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);      
      TIM_ForcedOC2Config(TIM1,TIM_ForcedAction_InActive);
   
          TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
     

           break;      
      case 0x05: //     CB
   
       /*  Channel3 configuration */
     TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);   //ͨµÀ3²úÉúPWM²¨ÐΠ T5¹Ü×Ó
     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
     /*  Channel2 configuration */
     TIM_CCxCmd(TIM1, TIM_Channel_2,  TIM_CCx_Disable);
     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);     //  T6
     TIM_ForcedOC2Config(TIM1,TIM_ForcedAction_Active);
  
     /*  Channel1 configuration */
     TIM_CCxCmd(TIM1, TIM_Channel_1,  TIM_CCx_Disable);
     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
     TIM_ForcedOC1Config(TIM1,TIM_ForcedAction_InActive);  
          TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
   

       break;
     case 0x01: //   AB
      
      /*  Channel1 configuration */
      TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);   //ͨµÀ1²úÉúPWM²¨ÐΠ T1¹Ü×Ó
     TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);

     /*  Channel2 configuration */
     TIM_CCxCmd(TIM1, TIM_Channel_2,  TIM_CCx_Disable);
     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);       //   T6
     TIM_ForcedOC2Config(TIM1,TIM_ForcedAction_Active);
  
     /*  Channel3 configuration */
     TIM_CCxCmd(TIM1, TIM_Channel_3,  TIM_CCx_Disable);
     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);
     TIM_ForcedOC3Config(TIM1,TIM_ForcedAction_InActive);  
          TIM_GenerateEvent(TIM1, TIM_EventSource_COM);

          break;
     case 0x03: //      AC
   
       TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);  //ͨµÀ1²úÉúPWM²¨ÐΠ T1¹Ü×Ó
      TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
      TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
      /*  Channel3 configuration */
      TIM_CCxCmd(TIM1, TIM_Channel_3,  TIM_CCx_Disable);
      TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);      // T2
      TIM_ForcedOC3Config(TIM1,TIM_ForcedAction_Active);
      /*  Channel2 configuration */
      TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable);
      TIM_CCxNCmd(TIM1, TIM_Channel_2,TIM_CCxN_Enable);
      TIM_ForcedOC2Config(TIM1,TIM_ForcedAction_InActive);
   
        TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
      

     
          break;
     case 0x02: //   BC
      
       /*  Channel2 configuration */
         TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1 );   //ͨµÀ2²úÉúPWM²¨ÐΠ T3¹Ü×Ó
     TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
     TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
  
     /*  Channel3 configuration */
     TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable);
     TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);         //  T2
     TIM_ForcedOC3Config(TIM1,TIM_ForcedAction_Active);
  
     /*  Channel1 configuration */   
     TIM_CCxCmd(TIM1, TIM_Channel_1,  TIM_CCx_Disable);
     TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
     TIM_ForcedOC1Config(TIM1,TIM_ForcedAction_InActive);
   
      TIM_GenerateEvent(TIM1, TIM_EventSource_COM);

         break;
     default:break;
    }