MSP430单片机与TI DAC7625产生三路正弦波

2019-08-01 15:58发布

MSP430单片机 与 TI DAC7625产生三路正弦波 .并行DAC7625输出三相sin波,波形在示波器上观察效果不错,相位基本稳定,可能是由于我电路设计的原因,导致在某些情况下各路的输出波形会有一定的干扰,当初主要是为了调试程序,所以没有考虑太多,有兴趣的朋友可以试试,为方便大家学习我把资料都放在了附件里(源程序和DAC7625PDF)。欢迎大家指正同时也欢迎大家讨论。
/*函数声明:并行DAC7625输出三相sin波。最高只能达到2.48V,不能达到2.5,(参考电压只有2.48)用A、B、C三个通道时D通道要受影响,没有开启也有波形输出,与B通道的重合。如果把D通道放前面使用会对紧挨着的通道产生干扰,使其与它波形一样,其他通道如果没有开启就没有波形输出*/

#include "msp430x16x.h"

#define DA_DATA_H    P2OUT //高4位//P2的低四位管脚
#define DA_DATA_L    P1OUT //低8位//P1的8个管脚

#define DA_RESET_1   P3OUT |= BIT2   
#define DA_RESET_0   P3OUT &=~ BIT2

#define DA_CS_1   P3OUT |= BIT3
#define DA_CS_0   P3OUT &=~ BIT3

#define DA_RW_1   P3OUT |= BIT4
#define DA_RW_0   P3OUT &=~ BIT4

#define DA_LDAC_1   P3OUT |= BIT5
#define DA_LDAC_0   P3OUT &=~ BIT5

#define DA_A0_1   P3OUT |= BIT0
#define DA_A0_0   P3OUT &=~ BIT0

#define DA_A1_1   P3OUT |= BIT1
#define DA_A1_0   P3OUT &=~ BIT1

unsigned int sin[120]={0x800,0x86b,0x8d5,0x940,0x9a9,0xa11,0xa78,0xadd,0xb40,
0xba1,0xbff,0xc5a,0xcb3,0xd08,0xd59,0xda7,0xdf1,0xe37,0xe78,0xeb5,0xeed,0xf20,
0xf4e,0xf77,0xf9b,0xfb9,0xfd2,0xfe6,0xff4,0xffd,0xfff,0xffd,0xff4,0xfe7,0xfd3,
0xfba,0xf9c,0xf78,0xf4f,0xf21,0xeee,0xeb6,0xe7a,0xe39,0xdf3,0xda9,0xd5c,0xd0a,
0xcb5,0xc5d,0xc02,0xba4,0xb43,0xae0,0xa7b,0xa14,0x9ac,0x943,0x8d9,0x86e,0x803,
0x798,0x72d,0x6c3,0x659,0x5f1,0x58a,0x525,0x4c2,0x461,0x403,0x3a7,0x34f,0x2fa,
0x2a8,0x25a,0x210,0x1cb,0x189,0x14c,0x114,0xe1,0xb2,0x89,0x65,0x46,0x2d,0x19,
0xb,0x3,0x0,0x2,0xa,0x18,0x2b,0x44,0x62,0x86,0xae,0xdc,0x10f,0x147,0x183,0x1c4,
0x20a,0x253,0x2a1,0x2f2,0x347,0x39f,0x3fa,0x458,0x4b9,0x51c,0x581,0x5e7,0x650,
0x6b9,0x723,0x78e};

unsigned int index1,index2,index3;

void port_init();
void clock_init();
void DAC7625_init();
void TimerB_init();
void DAC7625_data();
void main()
{
  WDTCTL = WDTPW + WDTHOLD;

  clock_init();
  port_init();
  DAC7625_init();
  TimerB_init();

  _EINT();
  while(1);
}

void clock_init()
{
  unsigned int i;
  BCSCTL1 &=~ XT2OFF;

  do
  {
    IFG1&=~OFIFG;
    for(i=0xff;i>0;i--);
  }
  while((IFG1&OFIFG)!=0);
  BCSCTL2 |= SELM_2;//MCLK
  BCSCTL2 |=SELS;//SMCLK=XT2 8M
}
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