关于DSP builder里编译出错问题

2019-03-25 07:25发布

站内问答 / FPGA
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我的软件版本是 MATLAB 2010b + DSP 11.0 + QUATUS 11.0 (都是32位）。
现在破解完了，编译时点击compile 时报错：
Info: Generating HDL

Info: Analyzing Simulink model
Info: Analysis was successful
Error: Error during compilation: Synthesis failed

已经断断续续弄了一个月了，有哪位大神有过类似经历能帮忙解决一下？谢谢了 此帖出自小平头技术问答
友情提示: 此问题已得到解决，问题已经关闭,关闭后问题禁止继续编辑，回答。
8条回答
yifeifei000
2019-03-25 23:14
>> dos('lmutil lmdiag C4D5_512A')
dos('lmutil lmdiag C4D5_512A')
dos('lmutil lmdiag C4D5_512A')
dos('lmutil lmdiag C4D5_512A')
lmutil - Copyright (c) 1989-2008 Acresso Software Inc. All Rights Reserved.
FLEXnet diagnostics on Fri 6/9/2017 09:48

-----------------------------------------------------
License file: D:license.dat
-----------------------------------------------------
"C4D5_512A" v2088.12, vendor: alterad
  uncounted nodelocked license, locked to ethernet address "98e7f464a11b"  expires: 01-dec-2088

This is the correct node for this node-locked license
-----------------------------------------------------

Enter <CR> to continue: "C4D5_512A" v2037.12, vendor: alterad
  uncounted nodelocked license, locked to ethernet address "98e7f464a11b"  expires: 01-dec-2037

This is the correct node for this node-locked license
-----------------------------------------------------

Enter <CR> to continue: "C4D5_512A" v9999.12, vendor: alterad
  uncounted nodelocked license, locked to ethernet address "98e7f464a11b"  expires: 22-mar-2037
  TS_OK: Checkout permitted when client is using terminal client

This is the correct node for this node-locked license
-----------------------------------------------------

Enter <CR> to continue: "C4D5_512A" v2050.01, vendor: alterad
  uncounted nodelocked license, locked to ethernet address "98e7f464a11b"  starts: 1-jan-1990,  no expiration date

  TS_OK: Checkout permitted when client is using terminal client

This is the correct node for this node-locked license
-----------------------------------------------------

ans =

     0

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