直接尝试将例化的simple dual port ram的输入信号（clka,ena,wea,adata,addra）连接到引脚，结果在map的时候出一大堆问题

百度，必应都没找到答案

是不是这种方式就是不可行的，ise提示错误如下：




ERROR:PhysDesignRules:1146 - Issue with pin connections and/or configuration on

   block:<u_sram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cs

   tr/ramloop[2].ram.r/s3a_init.ram/dpram.ram>:<RAMB16BWE_RAMB16BWE>.  The

   control pins for the RAMB16BWE must be used.

ERROR:PhysDesignRules:1146 - Issue with pin connections and/or configuration on

   block:<u_sram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cs

   tr/ramloop[12].ram.r/s3a_init.ram/dpram.ram>:<RAMB16BWE_RAMB16BWE>.  The

   control pins for the RAMB16BWE must be used.

ERROR:Pack:1642 - Errors in physical DRC.




先谢过各位~
此帖出自小平头技术问答