我用cordic 核实现开方功能，但是用modelsim  仿真的时候输出一直是蓝线，提示很多很多warning
# Loading work.sqare_test_tb
# Loading work.square_test
# Loading work.square
# Loading D:XISEverilogmti_seXilinxCoreLib_ver.C_REG_FD_V7_0
# Loading D:XISEverilogmti_seXilinxCoreLib_ver.C_SHIFT_RAM_V7_0
# Loading D:XISEverilogmti_seXilinxCoreLib_ver.C_ADDSUB_V7_0
# Loading D:XISEverilogmti_seXilinxCoreLib_ver.C_MUX_BIT_V7_0
# Loading D:XISEverilogmti_seunisims_ver.LUT4
# Loading D:XISEverilogmti_seunisims_ver.BUF
# Loading work.glbl
# ** Warning: (vsim-3017) square.v(872): [TFMPC] - Too few port connections. Expected 10, found 4.
#         Region: /sqare_test_tb/uut/YourInstanceName/BU20
# ** Warning: (vsim-3722) square.v(872): [TFMPC] - Missing connection for port 'SINIT'.
# ** Warning: (vsim-3722) square.v(872): [TFMPC] - Missing connection for port 'SSET'.
# ** Warning: (vsim-3722) square.v(872): [TFMPC] - Missing connection for port 'SCLR'.
# ** Warning: (vsim-3722) square.v(872): [TFMPC] - Missing connection for port 'AINIT'.
# ** Warning: (vsim-3722) square.v(872): [TFMPC] - Missing connection for port 'ASET'.
# ** Warning: (vsim-3722) square.v(872): [TFMPC] - Missing connection for port 'CE'.
# ** Warning: (vsim-3017) square.v(902): [TFMPC] - Too few port connections. Expected 10, found 4.
#         Region: /sqare_test_tb/uut/YourInstanceName/BU89
# ** Warning: (vsim-3722) square.v(902): [TFMPC] - Missing connection for port 'SINIT'.
# ** Warning: (vsim-3722) square.v(902): [TFMPC] - Missing connection for port 'SSET'.
# ** Warning: (vsim-3722) square.v(902): [TFMPC] - Missing connection for port 'SCLR'.
# ** Warning: (vsim-3722) square.v(902): [TFMPC] - Missing connection for port 'AINIT'.
# ** Warning: (vsim-3722) square.v(902): [TFMPC] - Missing connection for port 'ASET'.
# ** Warning: (vsim-3722) square.v(902): [TFMPC] - Missing connection for port 'CE'.
# ** Warning: (vsim-3017) square.v(932): [TFMPC] - Too few port connections. Expected 10, found 4.
.....
另请教高手们，我现在要实现的算法，好像不大容易避免开方，有没有别的办法实现开方 或者 对一个复数求模值呢 此帖出自小平头技术问答