Warning: Presettable and clearable registers converted to equivalent circuits with latches. Registers power-up to an undefined state, and DEVCLRn places the registers in an undefined state.
Warning (13310): Register "addr~reg0" is converted into an equivalent circuit using register "addr~reg0_emulated" and latch "addr~reg0latch"
请问上面这是触发器么,ADATA与ALOAD这两个引脚什么意思,这段代码综合出来为什么为有这个warning???感谢各位了
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你好,师兄谢谢你的解答。
想学习Altera,
veilog 买的是夏宇闻的那一本,那里面的那些代码是必须背住 ,然后自己写出来吗? 还是怎么学习呢?
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