下面是我写的一个程序，在quartus中编译没有错误，但是使用modelsim仿真输出的计算结果就是不对，我已经检查了很多遍了...请问这个程序的写法是否有问题？先感谢各位了~   module Data_pre_disposal(clk,en_in,x11,x12,en_out,
                         q11,q12,q13,q14,q15,q16,q17,q18);
input clk;
input en_in;
input signed[31:0]x11,x12;
output en_out;
output signed[31:0]q11,q12,q13,q14,q15,q16,q17,q18;
///参数全部扩大10的4次方
parameter signed s11=32'd101809,s12=32'd236624,
                 s21=32'd91253,s22=32'd142246,
                 s31=32'd74600,s32=32'd67593,
                 s41=32'd55393,s42=32'd16685,
                 s51=32'd36670,s52=-32'd10774,
                 s61=32'd20740,s62=-32'd18743,
                 s71=32'd9046,s72=-32'd13936,
                 s81=32'd2230,s82=-32'd4733;
///参数全部扩大10的4次方                
parameter signed tt1=-32'd2254740,
                 tt2=-32'd2104440,
                 tt3=-32'd1897609,
                 tt4=-32'd1642668,
                 tt5=-32'd1356603,
                 tt6=-32'd1065473,
                 tt7=-32'd803947,
                 tt8=-32'd613628;
///参数全部扩大10的4次方    
parameter signed res11=-32'd3897,res12=32'd911,res13=32'd657,res14=32'd411,
                 res15=32'd216,res16=32'd88,res17=32'd23,res18=32'd2,
    res21=32'd911,res22=-32'd4110,res23=32'd756,res24=32'd558,
    res25=32'd356,res26=32'd190,res27=32'd77,res28=32'd18,
    res31=32'd657,res32=32'd756,res33=-32'd4233,res34=32'd664,
    res35=32'd486,res36=32'd296,res37=32'd138,res38=32'd36,
    res41=32'd411,res42=32'd558,res43=32'd664,res44=-32'd4324,
    res45=32'd568,res46=32'd385,res47=32'd195 ,res48=32'd54,
    res51=32'd216,res52=32'd356,res53=32'd486,res54=32'd568,
    res55=-32'd4445,res56=32'd425,res57=32'd234,res58=32'd68,
    res61=32'd88,res62=32'd190,res63=32'd296,res64=32'd384,
    res65=32'd425,res66=-32'd4624,res67=32'd235,res68=32'd73,
    res71=32'd23,res72=32'd77,res73=32'd138,res74=32'd195,
    res75=32'd234,res76=32'd235,res77=-32'd4828,res78=32'd62,
    res81=32'd2,res82=32'd18,res83=32'd36,res84=32'd54,
    res85=32'd68,res86=32'd73,res87=32'd62,res88=-32'd4974;
parameter signed temp=16'd10000;
///参数全部扩大10的4次方
reg signed[31:0]x1_reg=32'd100,x2_reg=32'd100;
reg en_out=1'd0;
reg [3:0]cnt=4'd0;
reg signed[31:0]gf1,gf2,gf3,gf4,gf5,gf6,gf7,gf8;
reg signed[31:0]q11,q12,q13,q14,q15,q16,q17,q18; always@(posedge clk)//上一模块的发出的en_in维持两个时钟周期的高电平
begin
if(en_in)
begin                //接收输入数据x1模块
x1_reg<=x11;
x2_reg<=x12;
end
else begin
gf1<=(s11*x1_reg+s12*x2_reg)/temp+tt1;//gf的值扩大10的4次方
gf2<=(s21*x1_reg+s22*x2_reg)/temp+tt2;
gf3<=(s31*x1_reg+s32*x2_reg)/temp+tt3;
gf4<=(s41*x1_reg+s42*x2_reg)/temp+tt4;
gf5<=(s51*x1_reg+s52*x2_reg)/temp+tt5;
gf6<=(s61*x1_reg+s62*x2_reg)/temp+tt6;
gf7<=(s71*x1_reg+s72*x2_reg)/temp+tt7;
gf8<=(s81*x1_reg+s82*x2_reg)/temp+tt8;
q11<=(res11*gf1+res12*gf2+res13*gf3+res14*gf4+res15*gf5+res16*gf6+res17*gf7+res18*gf8)/temp;//q1的值扩大10的4次方
q12<=(res21*gf1+res22*gf2+res23*gf3+res24*gf4+res25*gf5+res26*gf6+res27*gf7+res28*gf8)/temp;
q13<=(res31*gf1+res32*gf2+res33*gf3+res34*gf4+res35*gf5+res36*gf6+res37*gf7+res38*gf8)/temp;
q14<=(res41*gf1+res42*gf2+res43*gf3+res44*gf4+res45*gf5+res46*gf6+res47*gf7+res48*gf8)/temp;
q15<=(res51*gf1+res52*gf2+res53*gf3+res54*gf4+res55*gf5+res56*gf6+res57*gf7+res58*gf8)/temp;
q16<=(res61*gf1+res62*gf2+res63*gf3+res64*gf4+res65*gf5+res66*gf6+res67*gf7+res68*gf8)/temp;
q17<=(res71*gf1+res72*gf2+res73*gf3+res74*gf4+res75*gf5+res76*gf6+res77*gf7+res78*gf8)/temp;
q18<=(res81*gf1+res82*gf2+res83*gf3+res84*gf4+res85*gf5+res86*gf6+res87*gf7+res88*gf8)/temp;
en_out<=1'd1;
end
if(en_out&&cnt<=2)cnt<=cnt+4'd1; //en_out使能下一模块，维持2周期的高电平
else begin
en_out<=1'd0;cnt<=4'd0;
end
end endmodule 此帖出自小平头技术问答