VHDL高手指点,谢谢

2019-03-25 10:12发布

小弟最近写了个程序,感觉没什么错误,但就是不能通过编译。期高手指点。小弟在此先谢谢啦!
程序如下:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY Controller IS
PORT(
--控制器输入信号
Clk:IN STD_LOGIC;
--时钟输入信号,由分频模块分频后接入1Hz信号
Reset:IN STD_LOGIC;
--复位信号,低电平有效,复位后交通灯全部熄灭
En:IN STD_LOGIC_VECTOR(1 DOWNTO 0);
--四种工作模式选择信号
Timer:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
--计数器数值选择端口,高低两位分别选择两个不同通行的时间
--控制器输出信号
Counter_a:OUT STD_LOGIC_VECTOR(5 DOWNTO 0);
Counter_b:OUT STD_LOGIC_VECTOR(5 DOWNTO 0);
--两个不同方向通行时间
Wr:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Ws:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Wl:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Wc:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
--西面交通信号灯输出
Nr:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Ns:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Nl:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Nc:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
--北面交通灯信号输出
Er:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Es:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
El:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Ec:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
--东面交通信号灯输出
Sr:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Ss:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Sl:OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
Sc:OUT STD_LOGIC_VECTOR(1 DOWNTO 0)
--南面交通信号灯输出
);
END Controller;

ARCHITECTURE Behav OF Controller IS
TYPE STATES IS (LOAD,NS,ES_WN,EW,WS_EN);
--定义模式一与模式二的五个状态
SIGNAL a,b:STD_LOGIC_VECTOR(1 DOWNTO 0);
--用于给输入的时间编码分段
SIGNAL count:STD_LOGIC_VECTOR(5 DOWNTO 0);
--用于寄存计数器临时值
SIGNAL count_a:STD_LOGIC_VECTOR(5 DOWNTO 0):="000000";
SIGNAL count_b:STD_LOGIC_VECTOR(5 DOWNTO 0):="000000";
--用于寄存计数器的具体值
SIGNAL current_state1,current_state2,next_state1,next_state2: STATES;
--分别用于模式一与模式二的状态寄存器
BEGIN
--各个模式及其状态转移
REG:ROCESS(Reset,Clk,Timer)
BEGIN
IF(Reset='0') THEN
Wr<="00";Ws<="00";Wl<="00";Wc<="00";Nr<="00";Ns<="00";Nl<="00";Nc<="00";
Er<="00";Es<="00";El<="00";Ec<="00";Sr<="00";Ss<="00";Sl<="00";Sc<="00";
a<=Timer(0)&Timer(1);
b<=Timer(2)&Timer(3);
CASE a IS
WHEN"00"=>count_a<="001111";
WHEN"01"=>count_a<="010100";
WHEN"10"=>count_a<="011001";
WHEN"11"=>count_a<="011110";
END CASE;
CASE b IS
WHEN"00"=>count_b<="000101";
WHEN"01"=>count_b<="001010";
WHEN"10"=>count_b<="001111";
WHEN"11"=>count_b<="010100";
END CASE;
current_state1<=LOAD;
current_state2<=LOAD;
ELSIF(Clk'EVENT AND Clk='1') THEN
current_state1<=next_state1;
current_state2<=next_state2;
END IF;
END PROCESS;
COM:ROCESS(current_state1,current_state2,next_state1,next_state2,en)
BEGIN
--进入模式一
IF(En="00") THEN
CASE current_state1 IS
WHEN LOAD =>                              --模式一状态0
IF(count="000000") THEN
Wr<="10";Ws<="10";Wl<="10";Wc<="10";Nr<="10";Ns<="10";Nl<="10";Nc<="10";
Er<="10";Es<="10";El<="10";Ec<="10";Sr<="10";Ss<="10";Sl<="10";Sc<="10";
ELSIF(count="000100") THEN
Wr<="01";Ws<="01";Wl<="01";Wc<="01";Nr<="01";Ns<="01";Nl<="01";Nc<="01";
Er<="01";Es<="01";El<="01";Ec<="01";Sr<="01";Ss<="01";Sl<="01";Sc<="01";
ELSE(count="000111")
next_state1<=NS;
count<="000000";
Counter_a<=count_a;
Counter_b<=count_b;
END IF;
count<=count+1;
WHEN NS =>                           --模式一状态1
Counter_a<=Count_a-1;
IF(Counter_a/="000000") THEN
Wr<="10";Ws<="10";Wl<="10";Wc<="01";Nr<="10";Ns<="01";Nl<="10";Nc<="10";
Er<="10";Es<="10";El<="10";Ec<="01";Sr<="10";Ss<="01";Sl<="10";Sc<="10";
next_state1<=NS;
ELSE next_state1<=ES_WN;Counter_a<=count_a;
END IF;
WHEN ES_WN =>                      --模式一状态2
Counter_b<=Counter_b-1;
IF(Counter_b/="000000") THEN
Wr<="10";Ws<="10";Wl<="10";Wc<="10";Nr<="01";Ns<="10";Nl<="01";Nc<="10";
Er<="10";Es<="10";El<="10";Ec<="10";Sr<="01";Ss<="10";Sl<="01";Sc<="10";
next_state1<=ES_WN;
ELSE next_state1<=EW;Counter_b<=count_b;
END IF;
WHEN EW =>                       --模式一状态3
Counter_a<=Counter_a-1;
IF(Counter_a/="000000") THEN
Wr<="10";Ws<="01";Wl<="10";Wc<="10";Nr<="10";Ns<="10";Nl<="10";Nc<="01";
Er<="10";Es<="01";El<="10";Ec<="10";Sr<="10";Ss<="10";Sl<="10";Sc<="01";
next_state1<=EW;
ELSE next_state1<=WS_EN;Counter_a<=count_a;
END IF;
WHEN WS_EN =>                      --模式一状态4
Counter_b<=Counter_b-1;
IF(Counter_b/="000000") THEN
Wr<="01";Ws<="10";Wl<="10";Wc<="10";Nr<="10";Ns<="10";Nl<="10";Nc<="10";
Er<="01";Es<="10";El<="10";Ec<="10";Sr<="10";Ss<="10";Sl<="10";Sc<="10";
next_state1<=WS_EN;
ELSE next_state1<=NS;Counter_b<=count_b;
END IF;
END CASE;
--进入模式二
ELSIF(En="01") THEN
CASE current_state2 IS
WHEN LOAD =>                   --模式二状态0
IF(count="000000") THEN
Wr<="10";Ws<="10";Wl<="10";Wc<="10";Nr<="10";Ns<="10";Nl<="10";Nc<="10";
Er<="10";Es<="10";El<="10";Ec<="10";Sr<="10";Ss<="10";Sl<="10";Sc<="10";
ELSIF(count="000100") THEN
Wr<="01";Ws<="01";Wl<="01";Wc<="01";Nr<="01";Ns<="01";Nl<="01";Nc<="01";
Er<="01";Es<="01";El<="01";Ec<="01";Sr<="01";Ss<="01";Sl<="01";Sc<="01";
ELSE(count="000111")
next_state2<=NS;
count<="000000";
Counter_a<=(count_a+count_b)/2;
Counter_b<=(count_a+count_b)/2;
END IF;
count<=count+1;
WHEN NS =>                     --模式二状态1
Counter_a<=Counter_a-1;
IF(Counter_a/="000000") THEN
Wr<="01";Ws<="10";Wl<="10";Wc<="01";Nr<="01";Ns<="10";Nl<="10";Nc<="10";
Er<="10";Es<="10";El<="10";Ec<="10";Sr<="10";Ss<="01";Sl<="01";Sc<="10";
next_state2<=NS;
ELSE next_state2<=ES_WN;Counter_a<=(count_a+count_b)/2;
END IF;
WHEN ES_WN =>                  --模式二状态2
Counter_b<=Counter_b-1;
IF(Counter_b/="000000") THEN
Wr<="10";Ws<="01";Wl<="01";Wc<="10";Nr<="01";Ns<="10";Nl<="10";Nc<="01";
Er<="01";Es<="10";El<="10";Ec<="10";Sr<="10";Ss<="10";Sl<="10";Sc<="10";
next_state2<=ES_WN;
ELSE next_state2<=EW;Counter_b<=(count_a+count_b)/2;
END IF;
WHEN EW =>                   --模式二状态3
Counter_a<=Counter_a-1;
IF(Counter_a/="000000") THEN
Wr<="10";Ws<="10";Wl<="10";Wc<="10";Nr<="10";Ns<="01";Nl<="01";Nc<="10";
Er<="01";Es<="10";El<="01";Ec<="01";Sr<="01";Ss<="10";Sl<="10";Sc<="10";
next_state2<=EW;
ELSE next_state2<=WS_EN;Counter_a<=(count_a+count_b)/2;
END IF;
WHEN WS_EN =>                  --模式二状态4
Counter_b<=Counter_b-1;
IF(Counter_b/="000000") THEN
Wr<="01";Ws<="10";Wl<="10";Wc<="10";Nr<="10";Ns<="10";Nl<="10";Nc<="10";
Er<="10";Es<="01";El<="10";Ec<="10";Sr<="01";Ss<="10";Sl<="01";Sc<="01";
next_state2<=WS_EN;
ELSE next_state2<=NS;Counter_b<=(count_a+count_b)/2;
END IF;
END CASE;
--进入模式三
ELSIF(En="10") THEN
Wr<="10";Ws<="10";Wl<="10";Wc<="01";Nr<="10";Ns<="10";Nl<="10";Nc<="01";
Er<="10";Es<="10";El<="10";Ec<="01";Sr<="10";Ss<="10";Sl<="10";Sc<="01";
--进入模式四
ELSE
Wr<="10";Ws<="10";Wl<="10";Wc<="10";Nr<="10";Ns<="10";Nl<="10";Nc<="10";
Er<="10";Es<="10";El<="10";Ec<="10";Sr<="10";Ss<="10";Sl<="10";Sc<="10";
END IF;
END PROCESS;
END ARCHITECTURE;


编译器提示:
Error (10500): VHDL syntax error at Controller.vhd(103) near text "next_state1"; expecting ":=", or "<="
Error (10500): VHDL syntax error at Controller.vhd(153) near text "next_state2"; expecting ":=", or "<=" 下图为ASM简图 [ 本帖最后由 苍穹的眼泪 于 2011-6-9 15:10 编辑 ] 此帖出自小平头技术问答
友情提示: 此问题已得到解决,问题已经关闭,关闭后问题禁止继续编辑,回答。
19条回答
eeleader
2019-03-27 18:54

怎么解决这个问题?

那就不要在多个PROCESS中对一个信号赋值就OK!

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

一周热门 更多>