OMAPL138以太网通讯无法ping通，烦烦烦，求大神帮忙

2019-03-26 16:25发布

站内问答 / DSP
10831 4 1238
我用的是OMAPL138的芯片，网卡是KSZ8041FTL，用的平台是CCS3.3，调试dsp，并且移植了Ucos操作系统，我把板子的网口和主机的网口用网线连起来，然后在主机的cmd中ping板子的IP地址，到目前为止就出现2次ping通，而且ping通了一下就超时了，一次丢包率是50%，另一次是75%。到目前为止我还找不到啥问题，可否请知道的人士请帮忙啊，可以直接QQ联系744936375. 此帖出自小平头技术问答
友情提示: 此问题已得到解决，问题已经关闭,关闭后问题禁止继续编辑，回答。
4条回答
HMILY_YLIMH
2019-03-27 13:09
  1. 代码其中之一：                                                        //-----------------------------------------------------------------------------
  2. // file    evmomapl138_emac.c
  3. // rief   implementation of the emac/mdio driver for the OMAP-L138 EVM.
  4. //
  5. //-----------------------------------------------------------------------------

  7. #include "stdio.h"
  8. #include "string.h"
  9. #include "os_cpu_isr.h"
  10. #include "includes.h"
  11. #include "inc/evmomapl138_emac.h"
  12. #include "inc/types.h"
  13. #include "evmomapl138.h"
  14. #include "evmomapl138_timer.h"
  15. #include "inc/ethernet_smsc.h"
  16. #include "inc/evmomapl138_gpio.h"
  17. #include "inc/evmomapl138_i2c_gpio.h"
  18. #include "inc/evmomapl138_cdce913.h"
  19. #include "evmomapl138_aintc.h"   // add_ISR需要
  20. #include "netif/etharp.h"
  21. #include "Emac_des.h"
  22. #include "ethernetif.h"
  23. #ifndef USE_HDTIME_DLY
  24. #define USTIMER_delay(x)               
  25. #endif //USE_HDTIME_DLY
  26. #define MAX_POLLING_NUM                (0x0FFFFFFF)
  27. //-----------------------------------------------------------------------------
  28. // Private Defines and Macros
  29. //-----------------------------------------------------------------------------
  30. // INTCONTROL >> INTPRESCALE , number of EMAC clk period within a 4 us time window
  31. #define NUM_INTPRESCALE    (4*SYSCLOCK4_HZ/1000000)  //4/(1000000/SYSCLOCK4_HZ) , 4us
  32. // mdio clock divide down value.
  33. #define MDIO_CLK_FREQ_HZ   (2000000)  //2M HZ
  34. #define MDIO_CLK_DIVISOR   ((SYSCLOCK4_HZ / MDIO_CLK_FREQ_HZ) - 1)
  35. // rx / tx desriptor memory offsets.
  36. #define RX_DESC_OFFSET     (0)
  37. #define TX_DESC_OFFSET     (0x1000)
  38. //MII pinmux
  39. #define PINMUX_MII_REG_0         (2)
  40. #define PINMUX_MII_MASK_0        (0xFFFFFFF0)
  41. #define PINMUX_MII_VAL_0         (0x88888880)
  42. #define PINMUX_MII_REG_1         (3)
  43. #define PINMUX_MII_MASK_1        (0xFFFFFFFF)
  44. #define PINMUX_MII_VAL_1         (0x88888888)
  45. //RMII pinmux
  46. #define PINMUX_RMII_REG_0        (14)
  47. #define PINMUX_RMII_MASK_0       (0xFFFFFF00)
  48. #define PINMUX_RMII_VAL_0        (0x88888800)
  49. #define PINMUX_RMII_REG_1        (15)
  50. #define PINMUX_RMII_MASK_1       (0x000000FF)
  51. #define PINMUX_RMII_VAL_1        (0x00000080)
  52. //MDIO pinmux
  53. #define PINMUX_MDIO_REG          (4)
  54. #define PINMUX_MDIO_MASK         (0x000000FF)
  55. #define PINMUX_MDIO_VAL          (0x00000088)
  56. //GPIO pinmux
  57. #define PINMUX_MII_MDIO_EN_REG         (6)
  58. #define PINMUX_MII_MDIO_EN_MASK         (0x000000F0)
  59. #define PINMUX_MII_MDIO_EN_VAL         (0x00000080)
  60. //
  61. #define EMAC_RMII_SPEED_100                 (0x00008000)
  62. //-----------------------------------------------------------------------------
  63. // Private Static Variables
  64. //-----------------------------------------------------------------------------
  65. static uint8_t g_active_phy_id = 0x0; //我们选用的L138是phy_id是为0的

  67. //-----------------------------------------------------------------------------
  68. // Private Function Prototypes
  69. //-----------------------------------------------------------------------------
  70. static uint32_t initMdioPhy(void);
  71. static uint8_t isLinkActive(uint8_t in_phy);
  72. static uint16_t phyRegRead(uint8_t in_phy, uint8_t in_reg);
  73. static void phyRegWrite(uint8_t in_phy, uint8_t in_reg, uint16_t in_data);

  75. //----------------------------------------------------------------------------
  76. //Public value definitions
  77. //----------------------------------------------------------------------------

  79. //-----------------------------------------------------------------------------
  80. // Public Function Definitions
  81. //-----------------------------------------------------------------------------

  83. //-----------------------------------------------------------------------------
  84. // rief   initialize the EMAC and MDIO for use.
  85. //
  86. // param   none.
  87. //
  88. // eturn  uint32_t
  89. //    ERR_NO_ERROR - everything is ok...emac ready to use.
  90. //    ERR_INIT_FAIL - something happened during initialization.
  91. //-----------------------------------------------------------------------------
  92. uint32_t Lowlevel_Emac_Init(void)
  93. {
  94.    uint32_t rtn = 0;
  95.    uint32_t i;
  96.   SYS_ARCH_DECL_PROTECT(sr);
  97.   SYS_ARCH_PROTECT(sr);

  99.    // reset emac module.
  100.    EMAC->SOFTRESET = 1;
  101.         while (EMAC->SOFTRESET != 0) {;}

  103.         //init emac control module
  104.         //----------------------------------------
  105.         // AddISR() -- configuration of the interrupt to the CPU.
  106.         //AINTC --Number34 core0 Receive Interrupt
  107.         AddISR(34,L138Ethif_RxHandler,(void *)0);
  108.         aintcRegs->SICR = 34; //clear index status
  109.         aintcRegs->CMR8 = 0x00170000;//(Sets channel map, system interrupt --> host channel interrupt )
  110.     aintcRegs->EISR = 34; //Enable Index Set Register
  111.         aintcRegs->SECR2 = 0x00000004; //34 status clear  

  113.         //configure Tx Interrupt Handler
  114.         AddISR(35,L138Ethif_TxHandler,(void *)0);
  115.         aintcRegs->SICR = 35; //clear index status
  116.         aintcRegs->CMR8 = 0x18000000; //SETS CHannel map
  117.         aintcRegs->EISR = 35; //Enable Index Set Register
  118.         aintcRegs->SECR2 = 0x00000008; //clear 35 status register ...

  120.         // configure INTCONTORL , CnRXIMAX, CnTXIMAX,
  121.         EMAC_CTRL->INTCTL = (NUM_INTPRESCALE| 0x00000300);
  122.         EMAC_CTRL->C0RXIMAX = 2;
  123.         EMAC_CTRL->C0TXIMAX = 2;
  124.         //--& init emac module.
  125.    //------------------
  126.    
  127.         // make sure emac control interrupts are disabled.
  128.    EMAC_CTRL->C0RXTHRESHEN = 0;
  129.    EMAC_CTRL->C1RXTHRESHEN = 0;
  130.    EMAC_CTRL->C2RXTHRESHEN = 0;
  131.    EMAC_CTRL->C0RXEN = 0;
  132.    EMAC_CTRL->C1RXEN = 0;
  133.    EMAC_CTRL->C2RXEN = 0;
  134.    EMAC_CTRL->C0TXEN = 0;
  135.    EMAC_CTRL->C1TXEN = 0;
  136.    EMAC_CTRL->C2TXEN = 0;
  137.    EMAC_CTRL->C0MISCEN = 0;
  138.    EMAC_CTRL->C1MISCEN = 0;
  139.    EMAC_CTRL->C2MISCEN = 0;

  141.    EVMOMAPL138_pinmuxConfig(PINMUX_MDIO_REG, PINMUX_MDIO_MASK, PINMUX_MDIO_VAL);                                           //MDIO shared by both RMII and MII
  142. //   EVMOMAPL138_pinmuxConfig(PINMUX_MII_MDIO_EN_REG, PINMUX_MII_MDIO_EN_MASK, PINMUX_MII_MDIO_EN_VAL); //pinmux to select gpio bank2 pin6
  143.            
  144.            //PINMUXING
  145.     EVMOMAPL138_pinmuxConfig(PINMUX_MII_REG_0, PINMUX_MII_MASK_0, PINMUX_MII_VAL_0);
  146.     EVMOMAPL138_pinmuxConfig(PINMUX_MII_REG_1, PINMUX_MII_MASK_1, PINMUX_MII_VAL_1);
  147.       
  148.     SYSCONFIG->KICKR[0] = KICK0R_UNLOCK;
  149.     SYSCONFIG->KICKR[1] = KICK1R_UNLOCK;
  150.     CLRBIT(SYSCONFIG->CFGCHIP[3], 0x00000100); //select mii mode !

  152.         //as software reset consideration, do this here
  153.    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_EMAC, PSC_ENABLE);

  155.    // clear MAC control register, receive control register, transmiter control register
  156.         EMAC->MACCONTROL = 0;
  157.         EMAC->RXCONTROL = 0;
  158.         EMAC->TXCONTROL = 0;
  159.   // init header descriptor pointer regs to 0.
  160.      for (i = 0; i < 8; i++)
  161.      {
  162.        EMAC->TXHDP[i] = 0;
  163.        EMAC->RXHDP[i] = 0;
  164.      }
  165.    // clear all statistic register
  166. #ifndef BOOT
  167.    memset((uint8_t *)NET_STAT_REG_BASE, 0, NET_STAT_REG_NUM_BYTES);
  168. #endif
  169.    // setup local MAC address, only channel 0 is valid.
  170.    // program all 8, only need to set MACADDRHI for index = 0.
  171.    // use duplicate address for all unused channels.
  172.    // TODO: read MAC address from SPI flash.
  173.    //写的顺序是MACINDEX, ADDRHI, ADDRLO,由于高40bits是共享的
  174.    //只用了通道0，EMAC->MACADDRLO = 0X000000506 |VALID|MATCHFILT
  175.    for (i = 1; i < 8; i++)
  176.    {
  177.       EMAC->MACINDEX = i;
  178.           EMAC->MACADDRHI = 0x42020304; //index -> hi -> lo
  179.       EMAC->MACADDRLO = 0x00000506;          
  180.    }
  181.    EMAC->MACINDEX = 0;
  182.    EMAC->MACADDRHI = 0x42020304;
  183.    // channel bit = 0, match mac address = 1
  184.    EMAC->MACADDRLO = 0x00000506 | MACADDRLO_VALID | MACADDRLO_MATCHFILT;

  186.     // for use tx DMA descriptor configuration:
  187.     EMAC->MACSRCADDRHI = 0x42020304;
  188.         EMAC->MACSRCADDRLO = 0x00000506;
  189.    // initialize receive channel free buffer count regs, if buffer flow
  190.    // control is to be enabled.
  191.    // NOTE: this example does not use buffer flow control.

  193.    // enable unicast chan 0 only.
  194.    EMAC->RXUNICASTSET = 0x01;
  195.    
  196.    // no multicast addresses, clear MAC address hash registers.
  197.    EMAC->MACHASH1 = 0;
  198.    EMAC->MACHASH2 = 0;

  200.    // 只允许broadcast的ARP数据包，和发给自己的包，以太网的其他数据不放入Memmory里去.
  201.    //但是我单独设置RxBroadEn却没有作用。
  202.    EMAC->RXMBPENABLE = 0;
  203.    SETBIT(EMAC->RXMBPENABLE, (RXBROADEN|RXCAFEN));
  204. // EMAC->RXMBPENABLE = 0x01E02020;                //enable reception of almost all frames inc error
  205.    
  206.    //11. configure MACCONTROL (Don't set GMIIEN Bit)
  207.    SETBIT(EMAC->MACCONTROL, (RMIISPEED|FULLDUPLEX|TXPACE)); //RMII_SPEED,为了适应RMII
  208.   
  209.         // 12. Clear all unused channel interrupt bits by writing the receive interrupt mask clear register
  210.         //(RXINTMASKCLEAR) and the transmit interrupt mask clear register (TXINTMASKCLEAR).
  211.         EMAC->RXINTMASKCLEAR |= 0xFE; //RX channel 0的中断不屏蔽
  212.         EMAC->TXINTMASKCLEAR |= 0xFE; //TX CH0 中断屏蔽
  213.         //13. Modify RXINTMASKSET, TXINTMASKSET,MACINTMASKSET
  214.         EMAC->RXINTMASKSET |= 0x01;
  215.         EMAC->TXINTMASKSET |= 0x01;
  216.         EMAC->MACINTMASKCLR = 0x03; //disabled host mask , stat interrupt
  217.    
  218.    //14 init receive buffer offset and max length.
  219.    EMAC->RXBUFFEROFFSET = 0;
  220.    EMAC->RXMAXLEN = MAX_PACKET_SIZE;
  221.    
  222.    // initialize receive/transmit descriptor list queues.
  223.    Emac_des_init(); //modify 04/18

  225.    //16 enable receive / transmit DMA controllers...set GMIIEN.
  226.    EMAC->RXCONTROL = 1;
  227.    EMAC->TXCONTROL = 1;
  228.    SETBIT(EMAC->MACCONTROL, GMIIEN );
  229. #if 1   //文档说未经测试，删除貌似没效果啊，先不管它
  230.    SETBIT(EMAC->EMCONTROL, SOFT);
  231. #endif
  232.    // -->& init mdio / phy, 再加上MAC中断
  233.    //-----------------
  234.    rtn = initMdioPhy();
  235. //   if (rtn != ERR_NO_ERROR)
  236. //      return (rtn);
  237.     SYS_ARCH_UNPROTECT(sr);
  238.    //17>Enable the device interrupt in EMAC control module registers CnRXTHRESHEN, CnRXEN, CnTXEN,
  239.    //and CnMISCEN. -- LP Add
  240.         EMAC_CTRL->C0RXEN = 1; //C0RXPULSE Is Enabled for RX channel 0   
  241.         EMAC_CTRL->C0TXEN = 1; //C0TXPULSE IS enabled for tx channel 0
  242.         return (rtn);
  243. }

  245. //-----------------------------------------------------------------------------
  246. // rief   power on the phy.
  247. //
  248. // param   none.
  249. //
  250. // eturn  uint32_t
  251. //    ERR_NO_ERROR - everything is ok...phy is on.
  252. //    ERR_FAIL - something happened and could not power on.
  253. //-----------------------------------------------------------------------------
  254. uint32_t EMAC_phyPowerOn(void)
  255. {
  256.    uint32_t rtn;
  257.    uint16_t ctrl_reg;

  259.    ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);

  261.    if (!CHKBIT(ctrl_reg, BASIC_CTRL_POWER_DOWN))
  262.    {
  263.       // phy is already on...nothing left to do.
  264.       #if DEBUG
  265.       printf("phy powered, basic ctrl reg: %04x ", ctrl_reg);
  266.       #endif
  267.       rtn = ERR_NO_ERROR;
  268.    }
  269.    else
  270.    {
  271.       // clear power down bit and write back to phy.
  272.       CLRBIT(ctrl_reg, BASIC_CTRL_POWER_DOWN);
  273.       phyRegWrite(g_active_phy_id, SMSC_REG_BASIC_CTRL, ctrl_reg);

  275.       // short delay, then read the reg back to verify loopback is enabled.
  276.       USTIMER_delay(500);
  277.       ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);
  278.       if (!CHKBIT(ctrl_reg, BASIC_CTRL_POWER_DOWN))
  279.       {
  280.          // phy is powered...return success.
  281.          #if DEBUG
  282.          printf("phy powered, basic ctrl reg: %04x ", ctrl_reg);
  283.          #endif
  284.          rtn = ERR_NO_ERROR;
  285.       }
  286.       else
  287.       {
  288.          // power down bit did not clear...return error.
  289.          #if DEBUG
  290.          printf("power down did not clear: %04x ", ctrl_reg);
  291.          #endif
  292.          rtn = ERR_FAIL;
  293.       }
  294.    }

  296.    return (rtn);
  297. }

  299. //-----------------------------------------------------------------------------
  300. // rief   power down the phy.
  301. //
  302. // param   none.
  303. //
  304. // eturn  uint32_t
  305. //    ERR_NO_ERROR - everything is ok...phy is powered down.
  306. //    ERR_FAIL - something happened and could not power down.
  307. //-----------------------------------------------------------------------------
  308. uint32_t EMAC_phyPowerDown(void)
  309. {
  310.    uint32_t rtn;
  311.    uint16_t ctrl_reg;

  313.    ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);

  315.    if(CHKBIT(ctrl_reg, BASIC_CTRL_ISOLATE) && CHKBIT(ctrl_reg, BASIC_CTRL_POWER_DOWN))
  316.    {
  317.       // phy is already powered down...nothing left to do.
  318.       #if DEBUG
  319.       printf("phy powered down, basic ctrl reg: %04x ", ctrl_reg);
  320.       #endif
  321.       rtn = ERR_NO_ERROR;
  322.    }
  323.    else
  324.    {
  325.       // set power down bit and write back to phy.
  326.       SETBIT(ctrl_reg, BASIC_CTRL_ISOLATE | BASIC_CTRL_POWER_DOWN);
  327.       phyRegWrite(g_active_phy_id, SMSC_REG_BASIC_CTRL, ctrl_reg);

  329.       // short delay, then read the reg back to verify loopback is disabled.
  330.       USTIMER_delay(500);
  331.       ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);

  333.       if(CHKBIT(ctrl_reg, BASIC_CTRL_ISOLATE) && CHKBIT(ctrl_reg, BASIC_CTRL_POWER_DOWN))
  334.       {
  335.          // phy is powered down...return success.
  336.          #if DEBUG
  337.          printf("phy powered down, basic ctrl reg: %04x ", ctrl_reg);
  338.          #endif
  339.          rtn = ERR_NO_ERROR;
  340.       }
  341.       else
  342.       {
  343.          // power down bit did not set...return error.
  344.          #if DEBUG
  345.          printf("power down bit did not set: %04x ", ctrl_reg);
  346.          #endif
  347.          rtn = ERR_FAIL;
  348.       }
  349.    }

  351.    return (rtn);
  352. }

  354. //-----------------------------------------------------------------------------
  355. // rief   put the phy into loopback mode.
  356. //
  357. // param   none.
  358. //
  359. // eturn  uint32_t
  360. //    ERR_NO_ERROR - everything is ok...phy is in loopback mode.
  361. //    ERR_FAIL - something happened and could not enter loopback.
  362. //-----------------------------------------------------------------------------
  363. uint32_t EMAC_phyEnterLoopback(void)
  364. {
  365.    uint32_t rtn;
  366.    uint16_t ctrl_reg;


  369.    ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);
  370.    rtn = ERR_NO_ERROR;

  372.    if (ctrl_reg & BASIC_CTRL_LOOPBACK)
  373.    {
  374.       // loopback is already enabled...nothing left to do.
  375.       #if DEBUG
  376.       printf("loopback enabled, basic ctrl reg: %04x ", ctrl_reg);
  377.       #endif
  378.       rtn = ERR_NO_ERROR;
  379.    }
  380.    else
  381.    {
  382.       // set loopback bit and write back to phy.
  383.       ctrl_reg |= BASIC_CTRL_LOOPBACK;
  384.       phyRegWrite(g_active_phy_id, SMSC_REG_BASIC_CTRL, ctrl_reg);

  386.       // short delay, then read the reg back to verify loopback is enabled.
  387.       USTIMER_delay(500);
  388.       ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);
  389.       if (ctrl_reg & BASIC_CTRL_LOOPBACK)
  390.       {
  391.          // loopback is enabled...return success.
  392.          #if DEBUG
  393.          printf("loopback enabled , basic ctrl reg: %04x ", ctrl_reg);
  394.          #endif
  395.          rtn = ERR_NO_ERROR;
  396.       }
  397.       else
  398.       {
  399.          // loopback bit did not get set...return error.
  400.          #if DEBUG
  401.          printf("loopback did not set: %04x ", ctrl_reg);
  402.          #endif
  403.          rtn = ERR_FAIL;
  404.       }
  405.    }
  406.    return (rtn);
  407. }

  409. //-----------------------------------------------------------------------------
  410. // rief   remove the phy from loopback mode.
  411. //
  412. // param   none.
  413. //
  414. // eturn  uint32_t
  415. //    ERR_NO_ERROR - everything is ok...phy is out of loopback mode.
  416. //    ERR_FAIL - something happened and could not disable loopback.
  417. //-----------------------------------------------------------------------------
  418. uint32_t EMAC_phyExitLoopback(void)
  419. {
  420.    uint32_t rtn;
  421.    uint16_t ctrl_reg;

  423.    ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);

  425.    if (!(ctrl_reg & BASIC_CTRL_LOOPBACK))
  426.    {
  427.       // loopback is already disabled...nothing left to do.
  428.       #if DEBUG
  429.       printf("loopback disabled, basic ctrl reg: %04x ", ctrl_reg);
  430.       #endif
  431.       rtn = ERR_NO_ERROR;
  432.    }
  433.    else
  434.    {
  435.       // clear loopback bit and write back to phy.
  436.       ctrl_reg &= ~BASIC_CTRL_LOOPBACK;
  437.       phyRegWrite(g_active_phy_id, SMSC_REG_BASIC_CTRL, ctrl_reg);

  439.       // short delay, then read the reg back to verify loopback is disabled.
  440.       USTIMER_delay(5);
  441.       ctrl_reg = phyRegRead(g_active_phy_id, SMSC_REG_BASIC_CTRL);
  442.       if (!(ctrl_reg & BASIC_CTRL_LOOPBACK))
  443.       {
  444.          // loopback is disabled...return success.
  445.          #if DEBUG
  446.          printf("loopback disabled , basic ctrl reg: %04x ", ctrl_reg);
  447.          #endif
  448.          rtn = ERR_NO_ERROR;
  449.       }
  450.       else
  451.       {
  452.          // loopback bit did not clear...return error.
  453.          #if DEBUG
  454.          printf("loopback did not clear: %04x ", ctrl_reg);
  455.          #endif
  456.          rtn = ERR_FAIL;
  457.       }
  458.    }

  460.    return (rtn);
  461. }

  463. //-----------------------------------------------------------------------------
  464. // Private Function Definitions
  465. //-----------------------------------------------------------------------------

  467. //-----------------------------------------------------------------------------
  468. // initialize the mdio module and identify the active phy.
  469. //-----------------------------------------------------------------------------
  470. uint32_t initMdioPhy(void)
  471. {
  472.    uint32_t i = 0;
  473.    uint16_t phy_reg;

  475.    // init the mdio regs.
  476.    MDIO->CONTROL = MDIO_CTRL_ENABLE |
  477.                      MDIO_CTRL_FAULT |
  478.                      MDIO_CTRL_FAULTENB |
  479.                      MDIO_CLK_DIVISOR;
  480.    while (CHKBIT(MDIO->CONTROL, MDIO_CTRL_IDLE)) {;}
  481. #if DEBUG_MDIO_LINK
  482.    // look for an active phy...takes up to 50 us for each phy to be checked.
  483.    //以下只是调试时有用，真正烧入程序中去时，是不行的，因为没插上网线，AddISR还要上的。
  484.    for (i = 0; i < MAX_POLLING_NUM; i++)
  485.    {
  486.       if (MDIO->ALIVE)
  487.       {
  488.          // at least one phy has acknowledged us...break the loop.
  489.          break;
  490.       }
  491.       USTIMER_delay(50);  // polling , 采用polling方式，LP- delete
  492.    }
  493.    while(!(MDIO->ALIVE)); //还是没有找到PHY，它就在此处挂住
  494. #else
  495.         while(!(MDIO->ALIVE)) //没有网线连接
  496.         {
  497.                 i++;
  498.                 if(i >= MAX_POLLING_NUM)
  499.                 {
  500.                         break;
  501.                 }
  502.         }//只是为了延时让phy与PC自适应的时涞却??
  503. #endif
  504. //
  505.    g_active_phy_id = 0; //确实是个发生错误，现在可以读到PHY。
  506.    MDIO->USERPHYSEL0 = 0;        //USERPHYSEL0 = 0,表示PHY0被选中监控。
  507. #if DEBUG_MDIO_LINK
  508.    phy_reg = phyRegRead(g_active_phy_id,0x02); //phy-id,查看phyRegRead是否正确;
  509.    if(phy_reg != 0x0022) //不等则芯片焊错
  510.    {
  511.         while(1);
  512.    }
  513. #endif

  515.    return (ERR_NO_ERROR);
  516. }

  518. //-----------------------------------------------------------------------------
  519. // returns if the link is currently active...1 -> active, 0 -> not active.
  520. //-----------------------------------------------------------------------------
  521. uint8_t isLinkActive(uint8_t in_phy)
  522. {
  523.    uint16_t status;

  525.    status = phyRegRead(in_phy, SMSC_REG_BASIC_STAT);
  526.    
  527.    if (CHKBIT(status, BASIC_STAT_LINK_STAT))
  528.       return (1);
  529.    else
  530.       return (0);
  531. }

  533. //-----------------------------------------------------------------------------
  534. // read a phy register using the MDIO.
  535. //-----------------------------------------------------------------------------
  536. uint16_t phyRegRead(uint8_t in_phy, uint8_t in_reg)
  537. {
  538.    // make sure mdio is not busy.
  539.    while (CHKBIT(MDIO->USERACCESS0, USERACC_GO)) {}

  541.    MDIO->USERACCESS0 = USERACC_GO |
  542.                         (in_reg << USERACC_SHIFT_REG) |
  543.                         (in_phy << USERACC_SHIFT_PHY);

  545.    while (CHKBIT(MDIO->USERACCESS0, USERACC_GO)) {}

  547.    return ((uint16_t)(MDIO->USERACCESS0 & USERACC_MASK_DATA));
  548. }

  550. //-----------------------------------------------------------------------------
  551. // write a phy register using the MDIO.
  552. //-----------------------------------------------------------------------------
  553. void phyRegWrite(uint8_t in_phy, uint8_t in_reg, uint16_t in_data)
  554. {
  555.    // make sure mdio is not busy.
  556.    while (CHKBIT(MDIO->USERACCESS0, USERACC_GO)) {}

  558.    MDIO->USERACCESS0 = USERACC_GO |
  559.                         USERACC_WRITE |
  560.                         (in_reg << USERACC_SHIFT_REG) |
  561.                         (in_phy << USERACC_SHIFT_PHY) |
  562.                         in_data;
  563. }


  566. 代码其中之二：
  567. /** Emac_des.c
  568. ** 由于在接收的过程中，可能存在一定的descriptor 问题，同时在与pbuf结合的情况
  569. ** 也存在着一些问题，故作如下修改。
  570. ** 现在决定作如下修改：
  571. ************************************/
  572. #include "includes.h"
  573. #include "Emac_des.h"
  574. #include "evmomapl138.h"
  575. #include "lwip/def.h"
  576. #include "lwip/pbuf.h"
  577. #include "lwip/sys.h"
  578. #include "lwip/opt.h"
  579. #include "inc/evmomapl138_emac.h"
  580. #include "etharp.h"
  581. #include "ethernetif.h"

  583. /* CPPI RAM size in bytes */
  584. #ifndef SIZE_CPPI_RAM
  585. #define SIZE_CPPI_RAM              0x2000   //8K, L138也一样
  586. #endif


  589. #define MAX_ALE_ENTRIES            1024
  590. #define ENTRY_TYPE                 0x30
  591. #define ENTRY_TYPE_IDX             7
  592. #define ENTRY_FREE                 0

  594. /* MDIO input and output frequencies in Hz */
  595. #define MDIO_FREQ_INPUT            125000000
  596. #define MDIO_FREQ_OUTPUT           1000000
  597. //flag --> 一样的描述
  598. #define CPDMA_BUF_DESC_OWNER       0x20000000
  599. #define CPDMA_BUF_DESC_SOP         0x80000000
  600. #define CPDMA_BUF_DESC_EOP         0x40000000
  601. #define CPDMA_BUF_DESC_EOQ         0x10000000

  603. #define MAX_TRANSFER_UNIT          1518 // Lp modified
  604. #define PBUF_LEN_MAX               MAX_TRANSFER_UNIT

  606. #define MAX_RX_PBUF_ALLOC          20   //使用20个看看
  607. #define MIN_PKT_LEN                60

  609. /* Define those to better describe the network interface. */
  610. #define IFNAME0                   'e'
  611. #define IFNAME1                   'n'


  614. /* TX Buffer descriptor data structure */
  615. struct cpdma_tx_bd {
  616.   volatile struct cpdma_tx_bd *next;
  617.   volatile u32_t bufptr;
  618.   volatile u32_t bufoff_len;
  619.   volatile u32_t flags_pktlen;
  620.   
  621.   /* 添加了一个这样的数据结构 */
  622.   volatile struct pbuf *pbuf;
  623. }cpdma_tx_bd;

  625. /* RX Buffer descriptor data structure */
  626. struct cpdma_rx_bd {
  627.   volatile struct cpdma_rx_bd *next;
  628.   volatile u32_t bufptr;
  629.   volatile u32_t bufoff_len;
  630.   volatile u32_t flags_pktlen;

  632.   /*添加了pbuf数据结构*/
  633.   volatile struct pbuf *pbuf;
  634. }cpdma_rx_bd;

  636. /**为的是编程者更好的处理RX channel发生的事件。***/
  637. struct rxch {
  638.   volatile struct cpdma_rx_bd *free_head;
  639.   volatile struct cpdma_rx_bd *active_head;
  640.   volatile struct cpdma_rx_bd *active_tail;
  641.   u32_t freed_pbuf_len;
  642. }rxch;

  644. /** 是TX Channel 更好的处理事件 ***/
  645. struct txch {
  646.   volatile struct cpdma_tx_bd *free_head;
  647.   volatile struct cpdma_tx_bd *active_tail;
  648.   volatile struct cpdma_tx_bd *next_bd_to_process;
  649. }txch;


  652. /**
  653. ** 这个是整个EMAC的操作界面数据结构 -- 不需要
  654. */
  655. struct emac_trif {
  656.   /* The tx/rx channels for the interface */
  657.   struct txch txch;
  658.   struct rxch rxch;
  659. }emac_trif;

  661. /*
  662. ** 初始化buffer descriptor
  663. ** 换了一个方式，用一个pbuf 链的方式来接收，免去拷贝。
  664. */
  665. err_t
  666. Emac_des_init( void )
  667. {
  668.   u32_t num_bd, pbuf_cnt = 0;
  669.   volatile struct cpdma_tx_bd *curr_txbd, *last_txbd;
  670.   volatile struct cpdma_rx_bd *curr_bd, *last_bd;
  671.   struct txch *txch;
  672.   struct rxch *rxch;
  673.   struct pbuf *p, *q;

  675.   //初始化.... 结构体..
  676.   //struct emac_trif {
  677.   memset((u8_t *)&emac_trif, 0, sizeof(emac_trif));
  678.   //struct txch {
  679.   memset((u8_t *)&txch, 0, sizeof(txch));
  680.   //struct rxch
  681.   memset((u8_t *)&rxch, 0, sizeof(rxch));
  682.   //struct cpdma_rx_bd {
  683.   memset((u8_t *)&cpdma_rx_bd, 0, sizeof(cpdma_rx_bd));
  684.   //struct cpdma_tx_bd {
  685.   memset((u8_t *)&cpdma_tx_bd, 0, sizeof(cpdma_rx_bd));
  686.   //取出txch的地址，以便操作
  687.   txch = &(emac_trif.txch);

  689. //EMAC_RAM_BASE是L138的buffer descriptor 所在CPPI RAM的起始地址
  690.   txch->free_head = (volatile struct cpdma_tx_bd*)(EMAC_RAM_BASE);
  691.   txch->next_bd_to_process = txch->free_head;
  692.   txch->active_tail = (volatile struct cpdma_tx_bd *)NULL;

  694. //多少个buffer desc, tx_bd... 特意SIZE_CPPI_RAM/2
  695.   num_bd = (SIZE_CPPI_RAM >> 1) / sizeof(cpdma_tx_bd);
  696.   
  697.   curr_txbd = txch->free_head;

  699.   /* Initialize all the TX buffer Descriptors */
  700.   while(num_bd--) {
  701.     curr_txbd->next = curr_txbd + 1;
  702.         curr_txbd->bufptr = 0; //初始化为0
  703.     curr_txbd->bufoff_len = 0; //也初始化为0
  704.     curr_txbd->flags_pktlen = 0;
  705.     curr_txbd->pbuf = 0;//现在还并没有pbuf要准备发送

  707.     last_txbd = curr_txbd;
  708.     curr_txbd = curr_txbd->next;
  709.   }
  710.   last_txbd->next = txch->free_head;
  711.   
  712.   /* Initialize the descriptors for the RX channel */
  713.   rxch = &(emac_trif.rxch);

  715.   rxch->active_head = (volatile struct cpdma_rx_bd*)(curr_txbd + 1);
  716.   
  717.   rxch->free_head = (volatile struct cpdma_rx_bd *)NULL;
  718.   rxch->freed_pbuf_len = 0;
  719.   num_bd = ((SIZE_CPPI_RAM >> 1) / sizeof(cpdma_rx_bd) - 1);
  720.   curr_bd = rxch->active_head;
  721.   last_bd = curr_bd;

  723.   /*
  724. ** 该驱动一个最大的不同就在此处，将接收的数据直接用DMA传送到pbuf,
  725. ** 以前我们都是用全局ram接收，而后拷贝至pbuf，还有一个不同就是
  726. ** 这里使用了EMAC部的CPPI_RAM空间，这样达到最好的效率。
  727. ** 但是为了考虑字节对齐的问题，还需要做点小小的修改
  728.   */
  729.   while(pbuf_cnt < MAX_RX_PBUF_ALLOC) {//产生10个pbuf..供接收DMA传送
  730. #if ETH_PAD_SIZE
  731.     p = pbuf_alloc(PBUF_RAW,(PBUF_LEN_MAX+ETH_PAD_SIZE), PBUF_POOL); //10 * 1500
  732.         pbuf_header(p, -ETH_PAD_SIZE); //向后移2个字节，接收过后，刚刚好
  733. #endif //ETH_PAD_SIZE
  734.     pbuf_cnt++;
  735.    
  736.     if(p != NULL) {
  737.       /* write the descriptors if there are enough numbers to hold the pbuf*/
  738.       if(((u32_t)pbuf_clen(p)) <= num_bd) {
  739.           // pbuf_clen(p)计算从p开始，pbuf链的长度
  740.           //如果pbuf_alloc产生比num_bd更大长度的描述符，那么就是个悲剧了。
  741.         for(q = p; q != NULL; q = q->next) {
  742.           curr_bd->bufptr = (u32_t)(q->payload); //buffer_ptr
  743.           curr_bd->bufoff_len = q->len; //buffoff & buffer_len
  744.           curr_bd->next = curr_bd + 1; //next buffer descriptor
  745.           curr_bd->flags_pktlen = CPDMA_BUF_DESC_OWNER; //flag set or clear
  746.          
  747.           /* Save the pbuf */
  748.           curr_bd->pbuf = q;
  749.           last_bd = curr_bd;
  750.           curr_bd = curr_bd->next;
  751.           num_bd--;
  752.         }//for
  753.       }//if <= num_bd
  754.    
  755.       /* free the allocated pbuf if no free descriptors are left */
  756.       else {
  757.         pbuf_free(p);
  758.         break;
  759.       }//else pbuf chain len > num_bd
  760.     }//if p != NULL
  761.     else {
  762.       break;
  763.     }//else p== NULL
  764.   }//while 产生10个

  766.   last_bd->next = (volatile struct cpdma_rx_bd *)NULL; //buff des chain 构造完成
  767.   rxch->active_tail = last_bd; //rxch控制着整个rxch的接收方式

  769.   EMAC->RXHDP[0] = (u32_t)(rxch->active_head); //add - lp
  770.   return ERR_OK;
  771. }



  775. /**
  776. ** 使用该rx_inhandler处理接收中断
  777. ** 每个pbuf链在处理之前必须要向前移ETH_PAD_SIZE个字节，以便4字节对齐
  778. ** 当你还要产生pbuf的时候，也要向后移ETH_PAD_SIZE个字节，以便接收。
  779. * @param netif the lwip network interface structure for this ethernetif
  780. * @return none
  781. */
  782. void
  783. Emac_rxint_handler(struct netif *netif) {
  784.   struct rxch *rxch;
  785.   volatile struct cpdma_rx_bd *curr_bd, *processed_bd, *curr_tail, *last_bd;
  786.   volatile struct pbuf *pbuf, *q, *new_pbuf;
  787.   u32_t ex_len = 0, len_to_alloc = 0;
  788.   u16_t tot_len;

  790. //  sitaraif = netif->state;
  791.   rxch = &(emac_trif.rxch);

  793.   //得到当前的rxch buffer desc
  794.   curr_bd = rxch->active_head;
  795.   last_bd = rxch->active_tail;
  796.   
  797.   //pbuf链中，SOP只出现一次，但是curr_bd已将buffer链推向下一个可能出现
  798.   //SOP的开头，所以这种方式更加严谨和有效。       
  799.    while(curr_bd->flags_pktlen & CPDMA_BUF_DESC_SOP) {
  800.   //用while是因为pbuf链来处理的
  801.     ex_len = 0;
  802.     len_to_alloc = 0;

  804.     //当OWNER被EMAC清掉的时候，EMAC就放弃了buff desc,可以做一些处理
  805.     if((curr_bd->flags_pktlen & CPDMA_BUF_DESC_OWNER)
  806.        != CPDMA_BUF_DESC_OWNER) {

  808.       if(rxch->free_head == NULL) {
  809.         /* this bd chain will be freed after processing */
  810.         rxch->free_head = curr_bd;     
  811.       }//if NULL
  812.      
  813.           //得到该接收到packet_len的长度
  814.       tot_len = (curr_bd->flags_pktlen) & 0xFFFF;

  816.       //保存当前接收的起始pbuf
  817.       q = curr_bd->pbuf;
  818.          //以下循环体为了更新除pbuf->payload除外，在结构体pbuf中
  819.          //的len,tot_len数据
  820.       do {
  821.                 //得到当前pbuf地址
  822.         pbuf = curr_bd->pbuf;
  823.         
  824.         /* If the earlier pbuf ended, update the chain */
  825.         if(pbuf->next == NULL) {
  826.           pbuf->next = (struct pbuf*)(curr_bd->next)->pbuf;
  827.         } //if Null
  828.       
  829.                 //len_to_alloc , pbuf链中的len的总和
  830.         len_to_alloc += pbuf->len;
  831.         /* Update the len and tot_len fields for the pbuf in the chain*/
  832.         pbuf->len = (curr_bd->bufoff_len) & 0xFFFF; //当前pbuf长度
  833.         pbuf->tot_len = tot_len - ex_len ; //当前pbuf后的tot_len长度（含自己）
  834.         processed_bd = curr_bd; //处理中的desc
  835.         ex_len += pbuf->len;
  836.         curr_bd = curr_bd->next;
  837.       } while((processed_bd->flags_pktlen & CPDMA_BUF_DESC_EOP)
  838.               != CPDMA_BUF_DESC_EOP);

  840.       /**
  841.        * Close the chain for this pbuf. A full packet is received in
  842.        * this pbuf chain. Now this pbuf can be given to upper layers for
  843.        * processing. The start of the pbuf chain is now 'q'.
  844.       */
  845.       pbuf->next = (struct pbuf *)NULL;
  846.   
  847. //在q处理之前，需要加上ETH_PAD_SIZE个空间，以便4字节对齐
  848. #if ETH_PAD_SIZE
  849.         if(q != NULL)
  850.         {
  851.             pbuf_header((struct pbuf *)q, ETH_PAD_SIZE);
  852. #endif //ETH_PAD_SIZE

  854. //为了节省中断的处理效率，这里节省时间，直接post msg给tcpip_thread
  855.                 if((netif->input((struct pbuf *)q,netif)) != ERR_OK)
  856.                 {
  857.                         pbuf_free((struct pbuf *)q);
  858.                         q = (volatile struct pbuf *)NULL;
  859.                 }
  860. #if ETH_PAD_SIZE
  861.         } //ETH_PAD_SIZE
  862. #endif //ETH_PAD_SIZE
  863.       /* Acknowledge that this packet is processed */
  864. //      CPSWCPDMARxCPWrite(sitaraif->cpsw_cpdma_base, 0, (unsigned int)processed_bd);
  865.           EMAC->RXCP[0] = (u32_t)processed_bd;
  866.       rxch->active_head = curr_bd;
  867.    
  868.       /**
  869.        * The earlier pbuf chain is freed from the upper layer. So, we need to
  870.        * allocate a new pbuf chain and update the descriptors with the pbuf info.
  871.        * To support chaining, the total length freed by the upper layer is tracked.
  872.        * Care should be taken even if the allocation fails.
  873.        */   
  874.       /**
  875.        * now len_to_alloc will contain the length of the pbuf which was freed
  876.        * from the upper layer
  877.        */
  878.       rxch->freed_pbuf_len += len_to_alloc;
  879.       new_pbuf = pbuf_alloc(PBUF_RAW, ((rxch->freed_pbuf_len)+ETH_PAD_SIZE), PBUF_POOL);

  881.       /* Write the descriptors with the pbuf info till either of them expires */
  882.       if(new_pbuf != NULL) {
  883. #if ETH_PAD_SIZE
  884.                    pbuf_header((struct pbuf *)new_pbuf, -ETH_PAD_SIZE);
  885. #endif //ETH_PAD_SIZE
  886.         curr_bd = rxch->free_head; //free_head,已经被释放的head,需要重新set
  887.                 //以下循环体添加新的pbuf到curr_bd中去
  888.         for(q = new_pbuf; (q != NULL) && (curr_bd != rxch->active_head); q = q->next) {
  889.           curr_bd->bufptr = (u32_t)(q->payload);
  890.          
  891.           /* no support for buf_offset. RXBUFFEROFFEST register is 0 */
  892.           curr_bd->bufoff_len = (q->len) & 0xFFFF;
  893.           curr_bd->flags_pktlen = CPDMA_BUF_DESC_OWNER;
  894.          
  895.           rxch->freed_pbuf_len -= q->len;
  896.          
  897.           /* Save the pbuf */
  898.           curr_bd->pbuf = q;
  899.           last_bd = curr_bd;
  900.           curr_bd = curr_bd->next;
  901.         }//for
  902.          
  903.         /**
  904.          * At this point either pbuf expired or no rxbd to allocate. If
  905.          * there are no, enough rx bds to allocate all pbufs in the chain,
  906.          * free the rest of the pbuf
  907.          */
  908.         if(q != NULL) {
  909.           pbuf_free((struct pbuf *)q);
  910.         }
  911.       
  912.         curr_tail = rxch->active_tail;
  913.         last_bd->next = (volatile struct cpdma_rx_bd *)NULL;
  914.       
  915.         curr_tail->next = rxch->free_head;
  916.         
  917.         /**
  918.          * Check if the reception has ended. If the EOQ flag is set, the NULL
  919.          * Pointer is taken by the DMA engine. So we need to write the RX HDP
  920.          * with the next descriptor.
  921.          */
  922.         if(curr_tail->flags_pktlen & CPDMA_BUF_DESC_EOQ) {
  923. //          CPSWCPDMARxHdrDescPtrWrite(sitaraif->cpsw_cpdma_base,
  924. //                                   (u32_t)(rxch->free_head), 0);
  925.                         EMAC->RXHDP[0] = (u32_t)(rxch->free_head);
  926.         }//if EOQ

  928.         rxch->free_head  = curr_bd;
  929.         rxch->active_tail = last_bd;
  930.       }//if new_pbuf
  931.     }//if OWNER
  932.     curr_bd = rxch->active_head;
  933. //以下这句,L138未做要求.
  934. //    CPSWCPDMANumFreeBufSet(sitaraif->cpsw_cpdma_base, 0, 1);
  935. // -----------括号不要删-------------------------------
  936.   }//While ....
  937. //-------------------------------------------
  938. // 以下在外面写
  939. //  CPSWCPDMAEndOfIntVectorWrite(sitaraif->cpsw_cpdma_base, CPSW_EOI_TX_PULSE);  
  940. //  CPSWCPDMAEndOfIntVectorWrite(sitaraif->cpsw_cpdma_base, CPSW_EOI_RX_PULSE);  
  941. }

  943. //---------------------------------------------------------------
  944. //以下是发送部分
  945. //---------------------------------------------------------------
  946. /**
  947. ** 这个函数将pbuf链的数据发送给物理层，可能buffer_des连接多处，因为是
  948. ** pbuf链连接而成的
  949. * @return None
  950. **/
  951. void Emac_transmit(struct pbuf *pbuf) {
  952.   struct pbuf *q;
  953.   struct txch *txch;
  954.   volatile struct cpdma_tx_bd *curr_bd, *active_head, *bd_end;
  955. // 取地址。
  956.   txch = &(emac_trif.txch);

  958. //得到可以使用的空闲head
  959.   curr_bd = txch->free_head;
  960.   //激活的head
  961.   active_head = curr_bd;

  963.   //更新该头的packet len 字段
  964.   curr_bd->flags_pktlen &= ~0xFFFF;
  965.   curr_bd->flags_pktlen |= pbuf->tot_len;

  967.   //交给EMAC之前，置位flags, SOP,OWNER
  968.   curr_bd->flags_pktlen |= (CPDMA_BUF_DESC_SOP | CPDMA_BUF_DESC_OWNER);

  970.   //把pbuf信息构建成buffer desc 链
  971.   for(q = pbuf; q != NULL; q = q->next) {

  973.     /* Intialize the buffer pointer and length */
  974.     curr_bd->bufptr = (u32_t)(q->payload);
  975.     curr_bd->bufoff_len = (q->len) & 0xFFFF;
  976.     bd_end = curr_bd;
  977.     curr_bd->pbuf = pbuf;
  978.     curr_bd = curr_bd->next;
  979.   }

  981.   //将buffer desc结尾
  982.   bd_end->next = (volatile struct cpdma_tx_bd *)NULL;
  983.   bd_end->flags_pktlen |= CPDMA_BUF_DESC_EOP;
  984.   //free_head指向下一个空的buff descriptor 处
  985.   txch->free_head = curr_bd;

  987.   //经过初始化之后,txch->active_tail指向NULL，但是发送buffer desc是一个
  988.   //单向的循环链表。所以这也是上面为什么bd_end->next要赋NULL值
  989.   if(txch->active_tail == NULL) {
  990. // 第一次发送active_head
  991.                 EMAC->TXHDP[0] = (u32_t)active_head;
  992.   }

  994.   /*
  995.   **第1次发送过后，假如发送完了，那么transmiter 将会halt，这样CPU在
  996.   **发送之前必须确认EOQ是否set,如果set,那么对于CPU来讲可以写HDP启动
  997.   **TXDMA发送了。
  998.   */
  999.   else {
  1000.     curr_bd = txch->active_tail;
  1001.     curr_bd->next = active_head;

  1003.     if(curr_bd->flags_pktlen & CPDMA_BUF_DESC_EOQ) {
  1004.      //假如EOQ被EMAC set之后，就启动tx DMA
  1005.                 EMAC->TXHDP[0] = (u32_t)active_head;
  1006.     }
  1007.   }

  1009.   txch->active_tail = bd_end;
  1010. }

  1012. /**
  1013. * This function will send a packet through the emac if the channel is
  1014. * available. Otherwise, the packet will be queued in a pbuf queue.
  1015. *
  1016. * @param netif the lwip network interface structure for this ethernetif
  1017. * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
  1018. * @return ERR_OK if the packet could be sent
  1019. *         an err_t value if the packet couldn't be sent
  1020. *
  1021. */
  1022. err_t
  1023. OmapEmac_output(struct netif *netif, struct pbuf *p)
  1024. {
  1025.   INT8U os_err = 0;
  1026.   SYS_ARCH_DECL_PROTECT(lev);

  1028.   //等待有效的信号量才能发送
  1029. //  OSSemPend(TxCmpSem, 1000, &os_err); // --LP , 2012/04/28 DLT

  1031.   /**
  1032.    * This entire function must run within a "critical section" to preserve
  1033.    * the integrity of the transmit pbuf queue.
  1034.    *
  1035.    */
  1036.   SYS_ARCH_PROTECT(lev);
  1037. //在选择发送之前，要调整p->payload的两字节，因为它们不能发送出去
  1038. #if ETH_PAD_SIZE
  1039.   pbuf_header(p, -ETH_PAD_SIZE);
  1040. #endif
  1041.   /* adjust the packet length if less than minimum required */
  1042.   if(p->tot_len < MIN_PKT_LEN) {
  1043.      p->tot_len = MIN_PKT_LEN;
  1044.      p->len = MIN_PKT_LEN;
  1045.   }

  1047.   /**
  1048.    * Bump the reference count on the pbuf to prevent it from being
  1049.    * freed till we are done with it.
  1050.    *
  1051.    */
  1052.   pbuf_ref(p);
  1053.    
  1054.   //Emac物理层的发送。DMA 用了TX中断的方式
  1055.   Emac_transmit(p);

  1057.   /* Return to prior interrupt state and return. */
  1058.   SYS_ARCH_UNPROTECT(lev);
  1059.   
  1060.   return ERR_OK;
  1061. }

  1063. /**
  1064. ** lower level 已经启动DMA发送了吗，这里是为了软件清掉SOP和EOP,然后就是pbuf
  1065. ** 链表的回收。
  1066. * @param netif the lwip network interface structure for this ethernetif
  1067. * @return none
  1068. */
  1069. void
  1070. Emac_txint_handler(struct netif *netif) {
  1071.   struct txch *txch;
  1072.   volatile struct cpdma_tx_bd *curr_bd, *next_bd_to_process;  
  1073.   
  1074. //取txch结构体的地址
  1075.   txch = &(emac_trif.txch);
  1076. //下一待处理的buff des, next_bd_to_process被初始化为(EMAC_RAM_BASE)   
  1077.   next_bd_to_process = txch->next_bd_to_process;
  1078. // 用curr_bd来处理  
  1079.   curr_bd = next_bd_to_process;
  1080.   
  1081.   /* Check for correct start of packet */
  1082.   while((curr_bd->flags_pktlen) & CPDMA_BUF_DESC_SOP) {
  1083.    
  1084.     /* Make sure that the transmission is over */
  1085.     while((curr_bd->flags_pktlen & CPDMA_BUF_DESC_OWNER)
  1086.           == CPDMA_BUF_DESC_OWNER);
  1087.    
  1088.     /* Traverse till the end of packet is reached */
  1089.     while(((curr_bd->flags_pktlen) & CPDMA_BUF_DESC_EOP) != CPDMA_BUF_DESC_EOP) {
  1090.        curr_bd = curr_bd->next;
  1091.     }//while(!EOP)

  1093.     next_bd_to_process->flags_pktlen &= ~(CPDMA_BUF_DESC_SOP);
  1094.     curr_bd->flags_pktlen &= ~(CPDMA_BUF_DESC_EOP);

  1096.     /**
  1097.      * If there are no more data transmitted, the next interrupt
  1098.      * shall happen with the pbuf associated with the free_head
  1099.      */
  1100.     if(curr_bd->next == NULL) {
  1101.       txch->next_bd_to_process = txch->free_head;
  1102.     }
  1103.   
  1104.     else {
  1105.       txch->next_bd_to_process = curr_bd->next; //接着处理下一帧数据包
  1106.     }
  1107.    
  1108.     //写TXCP[]，该帧数据包已经写完
  1109. //    CPSWCPDMATxCPWrite(sitaraif->cpsw_cpdma_base, 0, (u32_t)curr_bd);
  1110.         EMAC->TXCP[0] = (u32_t)curr_bd;
  1111.     pbuf_free((struct pbuf *)curr_bd->pbuf);

  1113. //    LINK_STATS_INC(link.xmit);
  1114.    
  1115.     next_bd_to_process = txch->next_bd_to_process;
  1116.     curr_bd = next_bd_to_process;
  1117.   }
  1118.   //发送信号量给发送部分保证发送的完整性。
  1119. //        OSSemPost(TxCmpSem);  //--lp , 2012/04/28 delete,查看效果。
  1120. //在外面写的
  1121. //  CPSWCPDMAEndOfIntVectorWrite(sitaraif->cpsw_cpdma_base, CPSW_EOI_TX_PULSE);
  1122. //  CPSWCPDMAEndOfIntVectorWrite(sitaraif->cpsw_cpdma_base, CPSW_EOI_RX_PULSE);
  1123. }

  1125. /********************* this file is end ****************************/

  1127. 代码其中之三：
  1128. /**************************************************************************
  1129. *                                                                         *
  1130. *   PROJECT     : TMON (Transparent monitor)                              *
  1131. *                                                                         *
  1132. *   MODULE      : LWIP.c                                                  *
  1133. *                                                                         *
  1134. *   AUTHOR      : Michael Anburaj                                         *
  1135. *                 URL  : http://geocities.com/michaelanburaj/             *
  1136. *                 EMAIL: michaelanburaj@hotmail.com                       *
  1137. *                                                                         *
  1138. *   PROCESSOR   : Any                                                     *
  1139. *                                                                         *
  1140. *   Tool-chain  : gcc                                                     *
  1141. *                                                                         *
  1142. *   DESCRIPTION :                                                         *
  1143. *   LwIP master source file.                                              *
  1144. *                                                                         *
  1145. **************************************************************************/

  1147. #include "tcpip.h"
  1148. #include "ethernetif.h"
  1149. #include "netconf.h"

  1151. /* ********************************************************************* */
  1152. /* Global definitions */
  1153. netif_t     main_net;

  1155. /* ********************************************************************* */
  1156. /* File local definitions */


  1159. /* ********************************************************************* */

  1161. /**
  1162. *** 初始化LwIP的协议栈
  1163.   */
  1164. void LwIP_Init( void )
  1165. {
  1166.   struct ip_addr ipaddr;
  1167.   struct ip_addr netmask;
  1168.   struct ip_addr gw;
  1169.       
  1170.   tcpip_init(NULL, NULL);
  1171.   
  1172. /** 在此处初始化IP地址 **/

  1174.   IP4_ADDR(&ipaddr,192,168,1,88); //该宏需要执行的！
  1175.   IP4_ADDR(&netmask,255,255,255,0);
  1176.   IP4_ADDR(&gw,192,168,0,1);

  1178.   MEMCPY(main_net.name,"glzn",4);
  1179. #if LWIP_NETIF_HOSTNAME  
  1180.   main_net.hostname = GetHostName();
  1181. #endif
  1182.   /* - netif_add(struct netif *netif, struct ip_addr *ipaddr,
  1183.             struct ip_addr *netmask, struct ip_addr *gw,
  1184.             void *state, err_t (* init)(struct netif *netif),
  1185.             err_t (* input)(struct pbuf *p, struct netif *netif))
  1186.    
  1187.    Adds your network interface to the netif_list. Allocate a struct
  1188.   netif and pass a pointer to this structure as the first argument.
  1189.   Give pointers to cleared ip_addr structures when using DHCP,
  1190.   or fill them with sane numbers otherwise. The state pointer may be NULL.

  1192.   The init function pointer must point to a initialization function for
  1193.   your ethernet netif interface. The following code illustrates it's use.*/
  1194.   
  1195.   
  1196.   netif_add(&main_net, &ipaddr, &netmask, &gw, NULL, ðernetif_init, &tcpip_input);
  1197.   /*  Registers the default network interface.*/
  1198.   netif_set_default(&main_net);  //可以删除 --2012/02/02, netif_default

  1200.   /*  When the netif is fully configured this function must be called.*/
  1201.    netif_set_up(&main_net); //this functional
  1202. }




  1207. /* ********************************************************************* */

  1209. 代码其中之四：
  1210. //主程序
  1211. //修改成适应LwIP v140的协议，此为系统main主函数
  1212. #include
  1213. #include
  1214. #include "dspint.h"
  1215. #include "sample.h"
  1216. #include "edma.h"
  1217. #include "norflash.h"
  1218. #include "evmomapl138.h"
  1219. #include "evmomapl138_gpio.h"
  1220. #include "evmomapl138_uart.h"
  1221. #include "evmomapl138_rtc.h"
  1222. #include "io.h"
  1223. #include "fpga_emifa.h"
  1224. #include "test_fpga.h"

  1226. //推荐的任务堆栈区大小为2048 OS_STK,即8192 byte
  1227. #define COMMON_STACK_LEN 2048

  1229. //给各个任务分配的堆栈区
  1230. OS_STK  TaskLWIPStk[COMMON_STACK_LEN];
  1231. OS_STK        TaskAppMainStk[COMMON_STACK_LEN];
  1232. OS_STK        TaskMMIStk[COMMON_STACK_LEN];
  1233. OS_STK        TaskFpgaUPPStk[COMMON_STACK_LEN];
  1234. OS_STK        TaskFpgaEMIFAStk[COMMON_STACK_LEN * 32];
  1235. //OS_STK        TaskTestStk[COMMON_STACK_LEN];
  1236. //各个任务进程主函数
  1237. void TaskAppMain(void *pd);
  1238. void TaskMMI(void *pd);//通过upp总线刷液晶数据，触发dsp中断，启动upp发送
  1239. extern void TaskLWIP(void *p_arg); //TaskLWIP任务
  1240. //extern void TaskTest(void *pd);


  1243. int main()
  1244. {
  1245.         //初始化中断向量
  1246.         OS_CPU_InitExceptVect();
  1247.         //初始化uC/OS-II实时内核
  1248.     OSInit();
  1249.         //创建系统主进程任务(放在最高优先级，包括装置定值、参数自检测，并作为其他任务的WatchDog。)
  1250.         OSTaskCreate(TaskAppMain, (void *)0, (OS_STK*)&TaskAppMainStk[COMMON_STACK_LEN-1], 2);
  1251.     //启动操作系统内核
  1252.         OSStart();
  1253. }

  1255. //系统主进程任务
  1256. void TaskAppMain(void *pd)
  1257. {
  1258.         unsigned char ucErr;
  1259.         tmr0_init();
  1260.         GPIOInit();
  1261.         chipint_init();
  1262.         memset((unsigned char *)TaskLWIPStk, 0, (COMMON_STACK_LEN*sizeof(OS_STK)));
  1263. //初始化由Lwip任务堆栈开辟的堆栈区域

  1265.         //INT8U enledflag = /;
  1266.         //INT32U counter = 0;
  1267.         //创建任务
  1268.         //OSTaskCreate(TaskFPGA_UPP, (void *)0, (OS_STK*)&TaskFpgaUPPStk[COMMON_STACK_LEN-1], 11);
  1269. //        OSTaskCreate(TaskFPGA_EMIFA, (void *)0, (OS_STK*)&TaskFpgaEMIFAStk[COMMON_STACK_LEN-1], 12);
  1270. //        OSTaskCreate(TaskMMI, (void *)0, (OS_STK*)&TaskMMIStk[COMMON_STACK_LEN-1], 13);
  1271.         //OSTaskCreate(TaskTest, (void *)0, (OS_STK*)&TaskTestStk[COMMON_STACK_LEN-1],100);
  1272.         OSTaskCreate(TaskLWIP,(void *)0,(OS_STK *)&TaskLWIPStk[COMMON_STACK_LEN -1],10);
  1273.         while(1)
  1274.         {
  1275.                   /*asm(" nop");
  1276.         counter++;
  1277.                 if(counter >=20)
  1278.                 {
  1279.                    enledflag ^=0x01;
  1280.            inb(ARM_DSP_CMD) = enledflag;
  1281.                    DspintArmtrip(DSPINTTYPE_2);
  1282.            counter = 0;
  1283.                 }
  1284.                 if(enledflag == 0)
  1285.                 {
  1286.                         ledchange();
  1287.                 }*/
  1288. //                OSTimeDly(500);
  1289. //                OSMboxPend(RxCntMbox,0,&ucErr);
  1290.             OSTimeDly(1000);
  1291.                 asm(" nop");
  1292.         }
  1293. }

  1295. //
  1296. #define  SHAREMMI_ADR    (0x80000200)     //共享液晶显示数据区地址
  1297. #define  MMI_LNUM        (240)            //液晶显示一屏数据的行数目
  1298. #define  MMI_LBYTE       (40)             //液晶显示一屏数据的行字节数目320/8
  1299. #define  MMI_DATALEN     (MMI_LNUM*MMI_LBYTE) //液晶显示缓冲区长度
  1300. #define  SHARERAW_ADR    (0x8002800)     //共享原始数据区地址
  1301. #define  SHAREMEA_ADR    (0x8001f000)     //共享测量结果区地址
  1302. //显存
  1303. #define LCD_XSIZE        (320)       // X方向像素
  1304. #define LCD_YSIZE        (240)       // Y方向像素
  1305. #define LCDMLEN ((LCD_XSIZE*LCD_YSIZE)/8)
  1306. INT8U LcdMemory[LCDMLEN];

  1308. void loadMMIdata()
  1309. {
  1310.    INT8U *pobject;
  1311.    INT16U i;
  1312.    static INT8U showdata = 0;
  1313.    static INT8U changeflag = 0;
  1314.    changeflag++;
  1315.    if(changeflag==6)
  1316.    {
  1317.                 changeflag=0;
  1318.                 showdata++;
  1319.    }
  1320.    pobject =LcdMemory;//(INT8U*)SHAREMMI_ADR;
  1321.    if(showdata == 0)
  1322.    {
  1323.                 for(i=0;i
  1324.             {
  1325.                *pobject++ = (i+1)&0xff;
  1326.             }
  1327.    }
  1328.    else
  1329.    {
  1330.                 for(i=0;i
  1331.            {
  1332.                *pobject++ = showdata;
  1333.            }
  1334.    }   
  1335. }

  1337. void TaskMMI(void *pd)
  1338. {
  1339.         while(1)
  1340.         {
  1341.             
  1342.                 //pushus(0);
  1343.         //loadMMIdata();
  1344.                 //EDMA0config(0,(void*)LcdMemory,(void*)SHAREMMI_ADR,LCDMLEN);
  1345.                
  1346.                 //pushus(1);
  1347.                 RelayTest();
  1348.                 OSTimeDly(100);
  1349.         }
  1350. }


  1353. 代码其中之五：
  1354. /* main.c
  1355. ** test lwip
  1356. ***************************************************/
  1357. #include
  1358. #include "evmomapl138.h"

  1360. #include
  1361. #include
  1362. #include
  1363. #include "lwip/mem.h"
  1364. #include "lwip/memp.h"
  1365. #include "lwip/netif.h"
  1366. #include "lwip/tcpip.h"
  1367. #include "lwip.h"
  1368. // LwIP task stk Information

  1370. /**
  1371. ** DEBUG Information
  1372. ****************************************************/

  1374. /**
  1375. ** global value
  1376. ***************************************************/

  1378. /**
  1379. ** function decl
  1380. **************************************************/
  1381. static void BSP_Init(void );
  1382. void tcpip_init_done(void *arg);

  1384. /* App_LwipTask
  1385. **
  1386. ************************************************************************/
  1387. void TaskLWIP(void *parg)
  1388. {
  1389.         //加载网卡驱动
  1390.         //加载L138本身自带的EMAC驱动
  1391.         //Lwip_v140使用lwip.c处理初始化网口的信息，主任务只要调用lwip_Init()即可
  1392.         LwIP_Init();
  1393.         while(1)
  1394.         {
  1395.                 OSTimeDly(2000);
  1396.         }
  1397. }

  1399. /* BSP_Init()
  1400. ** 配置启动的时钟，貌似omapL138_app/boot.asm 中
  1401. ** 有初始化STACK等配置，但是没有见到其内有时钟配置，工程初始化时也没有发现。
  1402. ** 故要初始化PLL
  1403. ********************************************/
  1404. void BSP_Init(void)
  1405. {
  1406.         EVMOMAPL138_Init();
  1407. }

  1409. 我贴了一些代码，请看看帮帮忙，我真不知道该如何解决啦...
复制代码

一周热门 更多>

相关问题