Protel Design System Design Rule Check
PCB File : ALTIUM2004_EAXAMPLE28335底板0520重新布局 eplace_ep3c25.PcbDoc
Date     : 2015/5/21
Time     : 8:24:18

Processing Rule : Hole Size Constraint (Min=0mil) (Max=1000mil) (All)
Rule Violations :0

Processing Rule : Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)
Rule Violations :0

Processing Rule : Width Constraint (Min=5mil) (Max=100mil) (Preferred=10mil) (All)
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=5mil) (All),(All)
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=Yes) (All),(All)
Rule Violations :0


Violations Detected : 15
Time Elapsed        : 00:00:02 此帖出自小平头技术问答