单步调试中,寄存器TSR和ESR值如下:
0: TSR: 0x1C00 0009 //发送请求已执行,但邮箱0发送失败
ESR: 0x0008 0030 //传输错误,错误计数器+8,错误类型:011 == 确认(ACK)错误
1: TSR: 0x1C00 0909 //发送请求已执行,但邮箱1、邮箱0发送失败
ESR: 0x0010 0040 //传输错误,错误计数器+8,错误类型:100 == 位隐性错误
2: TSR: 0x1C00 0909 //发送请求已执行,但邮箱1、邮箱0发送失败
ESR: 0x0018 0040 //传输错误,错误计数器+8,错误类型: 100 == 位隐性错误
3: TSR: 0x1C00 0909
ESR: 0x0020 0040
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10:TSR: 0x1C00 0903 //成功发送的一帧
ESR: 0x004F 0000
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/************************* PLL Parameters *************************************/
/* Select the PLL clock source */
//#define PLL_SOURCE_HSI // HSI (~16 MHz) used to clock the PLL, and the PLL is used as system clock source
#define PLL_SOURCE_HSE // HSE used to clock the PLL, and the PLL is used as system clock source
//#define PLL_SOURCE_HSE_BYPASS // HSE bypassed with an external clock (8MHz, coming from ST-Link) used to clock
// the PLL, and the PLL is used as system clock source
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#if defined (PLL_SOURCE_HSI)
#define PLL_M 16
#else
#define PLL_M 16 //marvin 1: 8->16
#endif
#define PLL_N 168 //marvin 2: 360->168
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
#define PLL_Q 48 //marvin 4: 7->48
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