在STM32H7 MCU上配置DMA请求多路复用器-hzp_bbs1的回答

在STM32H7 MCU上配置DMA请求多路复用器

2019-07-14 17:58发布

站内问答 / STM32/STM8

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我最近使用新生产的SM32H7 MCU，目前正在将一些旧代码迁移到它们（我想看看他们如何处理一些需要更高速度的应用程序）。H7具有DMA请求多路复用器，在我曾经使用的旧F7，F4或F3中不存在。在后一种模型中，通过向DMA_x Stream_y控制寄存器输入正确的值来完成DMA通道映射。例如DMA2_Stream3->CR |= (0x3 << DMA_SxCR_CHSEL_Pos);将为DM2 Stream3选择第三个通道（在F7 MCU的情况下，这将对应于SPI1 TX DMA请求：

据我所知，DMA流到DMA通道映射不再是“硬连线”，它可以在H7系列中手动重新配置。正如手册所述，必须使用DMAMux1将DMA请求线路连接到DMA通道。不幸的是，DMAMUX配置在参考手册中描述得相当差。我还没有意识到如何准确DMA流，外设和DMA通道通过多路复用器互连。下面是一段代码，理想情况下应该是

设置SPI1。
设置DMA。
启用DMA流以进行SPI TX传输
1. <font size="4">RCC->AHB4ENR |= RCC_AHB4ENR_GPIOAEN; // Enable usage of GPIOA
2. RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
4. GPIOA->MODER &= ~GPIO_MODER_MODER5;
5. GPIOA->MODER |= GPIO_MODER_MODER5_1; // Alternate function for SPI1 SCK on PA5
6. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR5; // High Speed on PA5
7. GPIOA->AFR[0] |= (0x05 << 5 * 4); // AFRL selected AF5 (SPI1 SCK) for PA5
9. GPIOA->MODER &= ~GPIO_MODER_MODER6;
10. GPIOA->MODER |= GPIO_MODER_MODER6_1; // Alternate function for SPI1 MISO on PA6
11. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR6; // High Speed on PA6
12. GPIOA->AFR[0] |= (0x05 << 6 * 4); // AFRL selected AF5 (SPI1 MISO) for PA6
14. GPIOA->MODER &= ~GPIO_MODER_MODER7;
15. GPIOA->MODER |= GPIO_MODER_MODER7_1; // Alternate function for SPI1 MOSI on PA7
16. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR7; // High Speed on PA7
17. GPIOA->AFR[0] |= (0x05 << 7 * 4); // AFRL selected AF5 (SPI1 MOSI) for PA7
19. GPIOA->MODER &= ~GPIO_MODER_MODER4;
20. GPIOA->MODER |= GPIO_MODER_MODER4_1; // Alternate function for SPI1 NSS on PA7
21. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR4; // High Speed on PA7
22. GPIOA->AFR[0] |= (0x05 << 4 * 4); // AFRL selected AF5 (SPI1 NSS) for PA7
24. GPIOA->PUPDR |= GPIO_PUPDR_PUPDR4_0; // Ensure all pull up pull down resistors are enabled
25. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR5; // Ensure all pull up pull down resistors are disabled
26. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // Ensure all pull up pull down resistors are disabled
27. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR7; // Ensure all pull up pull down resistors are disabled
29. SPI1->CFG1 = (1u << SPI_CFG1_MBR_Pos) | // Master baud rate: master clock / 2
30. (7u << SPI_CFG1_CRCSIZE_Pos) | // Length of CRC frame
31. SPI_CFG1_TXDMAEN | SPI_CFG1_RXDMAEN | // Enable RX/TX DMA
32. (7u << SPI_CFG1_FTHLV_Pos) | // FIFO threshold level
33. (7u << SPI_CFG1_DSIZE_Pos) //Number of bits in at single SPI data frame
34. ;
36. SPI1->CFG2 = SPI_CFG2_SSOE | // SS output enable
37. SPI_CFG2_MASTER // SPI Master
38. ;
40. RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN; // DMA2 clock enable;
42. DMA2_Stream3->CR = 0u;
43. DMA2_Stream3->PAR = (uint32_t) &(SPI1->TXDR);
44. DMA2_Stream3->M0AR = (uint32_t) &(Data_Buffer[0]);
45. DMA2_Stream3->CR |= (1u << DMA_SxCR_DIR_Pos);
46. DMA2_Stream3->CR |= DMA_SxCR_MINC;
47. DMA2_Stream3->CR |= DMA_SxCR_PL;
48. DMA2_Stream3->NDTR = 1000;
50. // 5. Use DMAMux1 to route a DMA request line to the DMA channel.
51. DMAMUX1_Channel0->CCR = (37u << DMAMUX_CxCR_DMAREQ_ID_Pos);
53. SPI1->CR1 |= SPI_CR1_SPE;
54. DMA2_Stream3->CR |= DMA_SxCR_EN;</font>
复制代码
此代码编译，我可以将其上传到STM32H753ZIT6 MCU。完整的代码还有PLL设置，它不包含在上面的代码段中（PLL初始化工作得很好，因为我能够探测MCO引脚上的400 MHz系统时钟）。DMA多路复用器设置无疑是不完整的。我只选择了一个适当的多路复用器输入资源。我甚至不确定多路复用器通道是否正确（或者他们的选择在H7 MCU中是否是任意的）。所以我的问题是为SPI TX传输设置DMA多路复用器的正确方法是什么？如果我可以运行这个MWE，我或多或少能够完成我的其余代码的迁移。
所以，我一直在尝试关注user9403409的建议，但不幸的是，我无法走得太远。我仍然无法让SPI在H7系列微控制器上通过DMA工作。现在我可以让SPI在没有H7的DMA的情况下正常工作：
1. <font size="4">#include "stm32h7xx.h"
3. #include <stdio.h>
4. #include <stdlib.h>
5. #include <string.h>
7. static void InitializeMCO(void);
8. static void ConfigureHSI(void);
9. static void InitializeMasterTxSPI(void);
10. uint8_t s_TransferBuffer[10];
12. int main()
13. {
14. s_TransferBuffer[0] = 0xAA;
15. s_TransferBuffer[1] = 0xBB;
16. s_TransferBuffer[2] = 0xCC;
18. ConfigureHSI();
19. InitializeMCO();
20. InitializeMasterTxSPI();
21. while(1){};
22. }
24. static void ConfigureHSI(void)
25. {
26. PWR->CR3 |= PWR_CR3_SCUEN;
27. PWR->D3CR |= (PWR_D3CR_VOS_1 | PWR_D3CR_VOS_0);
28. while ((PWR->D3CR & PWR_D3CR_VOSRDY) != PWR_D3CR_VOSRDY)
29. {
30. };
32. FLASH->ACR = FLASH_ACR_LATENCY_2WS;
34. RCC->CR |= RCC_CR_HSION;
35. while ((RCC->CR & RCC_CR_HSIRDY) != RCC_CR_HSIRDY)
36. {
37. };
39. RCC->PLLCKSELR = (4u << RCC_PLLCKSELR_DIVM1_Pos) |
40. (32u << RCC_PLLCKSELR_DIVM2_Pos) |
41. (32u << RCC_PLLCKSELR_DIVM3_Pos) |
42. RCC_PLLCKSELR_PLLSRC_HSI
43. ;
45. RCC->PLLCFGR = RCC_PLLCFGR_DIVR1EN |
46. RCC_PLLCFGR_DIVQ1EN |
47. RCC_PLLCFGR_DIVP1EN |
48. (2u << RCC_PLLCFGR_PLL1RGE_Pos) |
49. (1u << RCC_PLLCFGR_PLL1VCOSEL_Pos)
50. ;
52. RCC->PLL1DIVR = ((2u - 1u) << RCC_PLL1DIVR_R1_Pos) |
53. ((2u - 1u) << RCC_PLL1DIVR_Q1_Pos) |
54. ((2u - 1u) << RCC_PLL1DIVR_P1_Pos) |
55. ((10u - 1u) << RCC_PLL1DIVR_N1_Pos) // Reducing the clock rate so I can probe it with my slow USB scope
56. ;
58. RCC->D1CFGR = RCC_D1CFGR_D1CPRE_DIV1;
59. RCC->D1CFGR = RCC_D1CFGR_HPRE_DIV2 |
60. RCC_D1CFGR_D1PPRE_DIV2;
61. RCC->D2CFGR = RCC_D2CFGR_D2PPRE1_DIV2 |
62. RCC_D2CFGR_D2PPRE2_DIV2;
63. RCC->D3CFGR = RCC_D3CFGR_D3PPRE_DIV2;
65. RCC->CR |= RCC_CR_PLL1ON;
66. while (!(RCC->CR & RCC_CR_PLLRDY))
67. {
68. };
70. RCC->CFGR |= (1u << 25);
71. RCC->CFGR |= RCC_CFGR_SW_PLL1;
72. while (!(RCC->CFGR & RCC_CFGR_SWS_PLL1))
73. {
74. };
75. }
77. /* Displays MCO on PC9 */
78. static void InitializeMCO(void)
79. {
80. RCC->CFGR |= RCC_CFGR_MCO2;
81. RCC->CFGR |= (15 << 25); // Reducing the output so I can probe it with my slow USB scope
83. RCC->AHB4ENR &= ~RCC_AHB4ENR_GPIOCEN;
84. RCC->AHB4ENR |= RCC_AHB4ENR_GPIOCEN;
86. GPIOC->MODER &= ~GPIO_MODER_MODER9;
87. GPIOC->MODER |= GPIO_MODER_MODER9_1;
89. GPIOC->OTYPER &= ~GPIO_OTYPER_OT_9;
90. GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR9;
92. GPIOC->OSPEEDR &= ~GPIO_OSPEEDER_OSPEEDR9;
93. GPIOC->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR9;
95. GPIOC->AFR[0] &= ~GPIO_AFRL_AFRL0;
96. }
98. static void InitializeMasterTxSPI(void)
99. {
100. RCC->AHB4ENR |= RCC_AHB4ENR_GPIOAEN; // Enable usage of GPIOA
102. GPIOA->MODER &= ~GPIO_MODER_MODER5;
103. GPIOA->MODER |= GPIO_MODER_MODER5_1; // Alternate function for SPI1 SCK on PA5
104. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR5; // High Speed on PA5
105. GPIOA->AFR[0] |= (0x05 << 5 * 4); // AFRL selected AF5 (SPI1 SCK) for PA5
107. GPIOA->MODER &= ~GPIO_MODER_MODER6;
108. GPIOA->MODER |= GPIO_MODER_MODER6_1; // Alternate function for SPI1 MISO on PA6
109. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR6; // High Speed on PA6
110. GPIOA->AFR[0] |= (0x05 << 6 * 4); // AFRL selected AF5 (SPI1 MISO) for PA6
112. GPIOA->MODER &= ~GPIO_MODER_MODER7;
113. GPIOA->MODER |= GPIO_MODER_MODER7_1; // Alternate function for SPI1 MOSI on PA7
114. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR7; // High Speed on PA7
115. GPIOA->AFR[0] |= (0x05 << 7 * 4); // AFRL selected AF5 (SPI1 MOSI) for PA7
117. GPIOA->MODER &= ~GPIO_MODER_MODER4;
118. GPIOA->MODER |= GPIO_MODER_MODER4_1; // Alternate function for SPI1 NSS on PA7
119. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR4; // High Speed on PA7
120. GPIOA->AFR[0] |= (0x05 << 4 * 4); // AFRL selected AF5 (SPI1 NSS) for PA7
122. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR4; // Ensure all pull up pull down resistors are enabled
123. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR5; // Ensure all pull up pull down resistors are disabled
124. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // Ensure all pull up pull down resistors are disabled
125. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR7; // Ensure all pull up pull down resistors are disabled
127. RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
129. SPI1->CR1 = 0;
131. SPI1->CFG1 = (3u << SPI_CFG1_MBR_Pos) |
132. (7u << SPI_CFG1_CRCSIZE_Pos) |
133. //SPI_CFG1_TXDMAEN | // SPI_CFG1_RXDMAEN |
134. (7u << SPI_CFG1_FTHLV_Pos) |
135. (7u << SPI_CFG1_DSIZE_Pos)
136. ;
138. SPI1->CFG2 = SPI_CFG2_SSOE |
139. SPI_CFG2_MASTER
140. ;
142. SPI1->CR2 |= 3;
143. SPI1->CR1 |= SPI_CR1_SPE;
144. SPI1->CR1 |= SPI_CR1_CSTART;
146. for (uint32_t i=0; i<3; i++)
147. {
148. while ((SPI1->SR & SPI_SR_TXP) != SPI_SR_TXP){};
149. *((__IO uint32_t *)&SPI1->TXDR) = *((uint32_t *)&s_TransferBuffer[i]);
150. }
151. }</font>
复制代码
上面的代码基本上做了三件事：
- ConfigureHSI 初始化HSI时钟（我已经降低了时钟速度，以便能够使用我目前拥有的慢速USB示波器进行一些探测）。
- InitializeMCO 显示主时钟输出（只是为了确保时钟配置正确）。
- InitializeMasterTxSPI 配置SPI并发出三字节消息。
我绝对可以看到在我的示波器上发送的消息：时基为200 ns / div，供参考。
另一方面，如果我尝试通过DMA重做整个事情，我看不到任何输出。这就是我的基于DMA的SPI代码：
1. <font size="4">#include "stm32h7xx.h"
2. #include <stdio.h>
3. #include <stdlib.h>
4. #include <string.h>
6. static void InitializeMCO(void);
7. static void ConfigureHSI(void);
8. static void InitializeDMA(void);
9. static void InitializeMasterTxSPI(void);
10. uint8_t s_TransferBuffer[10];
12. int main()
13. {
14. s_TransferBuffer[0] = 0xAA;
15. s_TransferBuffer[1] = 0xBB;
16. s_TransferBuffer[2] = 0xCC;
18. ConfigureHSI();
19. InitializeMCO();
20. InitializeDMA();
21. InitializeMasterTxSPI();
22. while(1){};
23. }
25. /* Initializes the MCU clock */
26. static void ConfigureHSI(void)
27. {
28. PWR->CR3 |= PWR_CR3_SCUEN;
29. PWR->D3CR |= (PWR_D3CR_VOS_1 | PWR_D3CR_VOS_0);
30. while ((PWR->D3CR & PWR_D3CR_VOSRDY) != PWR_D3CR_VOSRDY)
31. {
32. };
34. FLASH->ACR = FLASH_ACR_LATENCY_2WS;
36. RCC->CR |= RCC_CR_HSION;
37. while ((RCC->CR & RCC_CR_HSIRDY) != RCC_CR_HSIRDY)
38. {
39. };
41. RCC->PLLCKSELR = (4u << RCC_PLLCKSELR_DIVM1_Pos) |
42. (32u << RCC_PLLCKSELR_DIVM2_Pos) |
43. (32u << RCC_PLLCKSELR_DIVM3_Pos) |
44. RCC_PLLCKSELR_PLLSRC_HSI
45. ;
47. RCC->PLLCFGR = RCC_PLLCFGR_DIVR1EN |
48. RCC_PLLCFGR_DIVQ1EN |
49. RCC_PLLCFGR_DIVP1EN |
50. (2u << RCC_PLLCFGR_PLL1RGE_Pos) |
51. (1u << RCC_PLLCFGR_PLL1VCOSEL_Pos)
52. ;
54. RCC->PLL1DIVR = ((2u - 1u) << RCC_PLL1DIVR_R1_Pos) |
55. ((2u - 1u) << RCC_PLL1DIVR_Q1_Pos) |
56. ((2u - 1u) << RCC_PLL1DIVR_P1_Pos) |
57. ((10u - 1u) << RCC_PLL1DIVR_N1_Pos) // Reducing the clock rate so I can probe it with my slow USB scope
58. ;
60. RCC->D1CFGR = RCC_D1CFGR_D1CPRE_DIV1;
61. RCC->D1CFGR = RCC_D1CFGR_HPRE_DIV2 |
62. RCC_D1CFGR_D1PPRE_DIV2;
63. RCC->D2CFGR = RCC_D2CFGR_D2PPRE1_DIV2 |
64. RCC_D2CFGR_D2PPRE2_DIV2;
65. RCC->D3CFGR = RCC_D3CFGR_D3PPRE_DIV2;
67. RCC->CR |= RCC_CR_PLL1ON;
68. while (!(RCC->CR & RCC_CR_PLLRDY))
69. {
70. };
72. RCC->CFGR |= (1u << 25);
73. RCC->CFGR |= RCC_CFGR_SW_PLL1;
74. while (!(RCC->CFGR & RCC_CFGR_SWS_PLL1))
75. {
76. };
77. }
79. /* Displays MCO on PC9 */
80. static void InitializeMCO(void)
81. {
82. RCC->CFGR |= RCC_CFGR_MCO2;
83. RCC->CFGR |= (15 << 25); // Reducing the output so I can probe it with my slow USB scope
85. RCC->AHB4ENR &= ~RCC_AHB4ENR_GPIOCEN;
86. RCC->AHB4ENR |= RCC_AHB4ENR_GPIOCEN;
88. GPIOC->MODER &= ~GPIO_MODER_MODER9;
89. GPIOC->MODER |= GPIO_MODER_MODER9_1;
91. GPIOC->OTYPER &= ~GPIO_OTYPER_OT_9;
92. GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR9;
94. GPIOC->OSPEEDR &= ~GPIO_OSPEEDER_OSPEEDR9;
95. GPIOC->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR9;
97. GPIOC->AFR[0] &= ~GPIO_AFRL_AFRL0;
98. }
100. static void InitializeDMA()
101. {
102. RCC->AHB2ENR |= (0x7 << 29); // Enable the SRAM
103. RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN; // DMA1 clock enable;
105. // Set the peripheral and memory addresses:
106. DMA1_Stream0->PAR = *((__IO uint32_t *)&SPI1->TXDR);
107. DMA1_Stream0->M0AR = *((uint32_t *)&s_TransferBuffer[0]);
109. DMA1_Stream0->CR = 0u;
110. DMA1_Stream0->CR |= (1u << DMA_SxCR_DIR_Pos); // Memory to peripheral
111. DMA1_Stream0->CR |= DMA_SxCR_MINC; // Memory increment mode
112. DMA1_Stream0->CR |= (3u << DMA_SxCR_PL_Pos); // Very high priority
114. DMA1_Stream0->NDTR = 3; // Number of data
116. DMAMUX1_Channel0->CCR = (38u << DMAMUX_CxCR_DMAREQ_ID_Pos);
118. }
120. static void InitializeMasterTxSPI(void)
121. {
122. RCC->AHB4ENR |= RCC_AHB4ENR_GPIOAEN; // Enable usage of GPIOA
124. GPIOA->MODER &= ~GPIO_MODER_MODER5;
125. GPIOA->MODER |= GPIO_MODER_MODER5_1; // Alternate function for SPI1 SCK on PA5
126. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR5; // High Speed on PA5
127. GPIOA->AFR[0] |= (0x05 << 5 * 4); // AFRL selected AF5 (SPI1 SCK) for PA5
129. GPIOA->MODER &= ~GPIO_MODER_MODER6;
130. GPIOA->MODER |= GPIO_MODER_MODER6_1; // Alternate function for SPI1 MISO on PA6
131. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR6; // High Speed on PA6
132. GPIOA->AFR[0] |= (0x05 << 6 * 4); // AFRL selected AF5 (SPI1 MISO) for PA6
134. GPIOA->MODER &= ~GPIO_MODER_MODER7;
135. GPIOA->MODER |= GPIO_MODER_MODER7_1; // Alternate function for SPI1 MOSI on PA7
136. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR7; // High Speed on PA7
137. GPIOA->AFR[0] |= (0x05 << 7 * 4); // AFRL selected AF5 (SPI1 MOSI) for PA7
139. GPIOA->MODER &= ~GPIO_MODER_MODER4;
140. GPIOA->MODER |= GPIO_MODER_MODER4_1; // Alternate function for SPI1 NSS on PA4
141. GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR4; // High Speed on PA4
142. GPIOA->AFR[0] |= (0x05 << 4 * 4); // AFRL selected AF5 (SPI1 NSS) for PA4
144. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR4; // Ensure all pull up pull down resistors are enabled
145. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR5; // Ensure all pull up pull down resistors are disabled
146. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // Ensure all pull up pull down resistors are disabled
147. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR7; // Ensure all pull up pull down resistors are disabled
149. RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
151. SPI1->CR1 = 0;
152. SPI1->CFG1 = (3u << SPI_CFG1_MBR_Pos) |
153. (7u << SPI_CFG1_CRCSIZE_Pos) |
154. SPI_CFG1_TXDMAEN | // SPI_CFG1_RXDMAEN |
155. (7u << SPI_CFG1_FTHLV_Pos) |
156. (7u << SPI_CFG1_DSIZE_Pos)
157. ;
158. SPI1->CFG2 = SPI_CFG2_SSOE |
159. SPI_CFG2_MASTER
160. ;
162. //SPI1->CR2 |= 3;
163. SPI1->CR1 |= SPI_CR1_SPE;
164. SPI1->CR1 |= SPI_CR1_CSTART;
166. DMA1_Stream0->CR |= DMA_SxCR_EN;
167. }</font>
复制代码本质上，它是一回事，唯一的区别是有一个InitializeDMA功能，DMA传输是通过DMA1_Stream0->CR |= DMA_SxCR_EN命令启动的（就像之前的MCU系列中的情况一样）。所以，遗憾的是，我仍然无法通过H7上的DMA启动SPI。任何帮助将不胜感激。

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6条回答

2019-07-15 20:51

现在考虑所有事情，DMAMUX的基本功能并不太难。手册指出：
DMAMUX1通道0到7连接到DMA1通道0到7
DMAMUX1通道8至15连接到DMA2通道0至7
DMAMUX2通道0到7连接到BDMA通道0到7
这些以及多路复用器输入到资源表的分配是使DMA运行的关键（至少以与旧系列MCUS相同的方式运行）。例如，SPI1_TX位于DMAMUX1的第38个DMA请求MUX输入上（参见参考手册中的表110）。这意味着我可以使用DMA1或DMA2（而不是BDMA，因为它链接到DMAMUX2）。我可以选择我想要的任何流，他们只需要遵循以下规则：
DMA1_Stream_x - > DMAMUX1_Channel_x
DMA2_Stream_x - > DMAMUX1_Channel_（x + 8）
因此，这就是通过DMAMUX的特定通道将外设实际链接到DMA流的方式。
还有几点需要注意：
不要忘记设置SPI_CR1_CSTART位（这是H7的新功能）。
注意SPI->CR2寄存器。如果为其写入值，则SPI传输将在预定义的数据传输开始后停止。如果我设置了CR2，那么无限循环（如我的示例所示）将无法工作（我们只会获得一次完整的SPI传输）。
虽然现在整个事情对我来说似乎有点明显，但我仍觉得参考文献中的信息有些缺乏。旧系列手册中的DMA操作稍微好一点。例如，我仍然不知道如何（以及何时）利用DMAMUX的剩余功能（如请求生成器和诸如此类）。此外，我不太确定如何实现内存到内存的传输。
我希望这有助于任何想深入研究ARM编程的人。

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