msp430怎么使用uart双向接收与发送

2019-03-24 09:08发布

UCA0IE |= UCRXIE和UCA1IE |= UCTXIE中断要一起开开吗?这两个好像都是进入USCI_A0_VECTOR中断。

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littleshrimp
2019-03-25 05:15
one55 发表于 2016-7-22 20:55 5529的接收和发送中断向量是多少?我看例程里面用的都是同一个,而且不知道为什么都是放在case2那接收与 ...
MSP430F5529和MSP430G2553不同,收发中断都对应USCI_A0_VECTOR,注意蓝底白字处,两个case分别对应接收和发送


//******************************************************************************

//   MSP430F552x Demo - USCI_A0, 9600 UART, SMCLK, LPM0, Echo with over-sampling

//

//   Description: Echo a received character, RX ISR used. Normal mode is LPM0.

//   USCI_A0 RX interrupt triggers TX Echo.

//   If UCOS16=1, UCBRx=Fbrclk/(16*Baudrate)

//   Baud rate divider with UCBRx = 1MHz/(16*9600) = ~6.8

//   ACLK = REFO = ~32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

//   See User Guide for baud rate divider table

//

//               MSP430F552x

//             -----------------

//         /||                 |

//          | |                 |

//          --|RST              |

//            |                 |

//            |     P3.3/UCA0TXD|------------>

//            |                 | 9600 - 8N1

//            |     P3.4/UCA0RXD|<------------

//

//   Bhargavi Nisarga

//   Texas Instruments Inc.

//   April 2009

//   Built with CCSv4 and IAR Embedded Workbench Version: 4.21

//******************************************************************************

 

#include <msp430.h>

 

int main(void)

{

  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT

  P3SEL = BIT3+BIT4;                        // P3.4,5 = USCI_A0 TXD/RXD

  UCA0CTL1 |= UCSWRST;                      // **Put state machine in reset**

  UCA0CTL1 |= UCSSEL_2;                     // SMCLK

  UCA0BR0 = 6;                              // 1MHz 9600 (see User's Guide)

  UCA0BR1 = 0;                              // 1MHz 9600

  UCA0MCTL = UCBRS_0 + UCBRF_13 + UCOS16;   // Modln UCBRSx=0, UCBRFx=0,

                                            // over sampling

  UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**

  UCA0IE |= UCRXIE;                         // Enable USCI_A0 RX interrupt

 

  __bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, interrupts enabled

  __no_operation();                         // For debugger

}

 

// Echo back RXed character, confirm TX buffer is ready first

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)

#pragma vector=USCI_A0_VECTOR

__interrupt void USCI_A0_ISR(void)

#elif defined(__GNUC__)

void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)

#else

#error Compiler not supported!

#endif

{

  switch(__even_in_range(UCA0IV,4))

  {

  case 0:break;                             // Vector 0 - no interrupt

  case 2:                                   // Vector 2 - RXIFG

    while (!(UCA0IFG&UCTXIFG));             // USCI_A0 TX buffer ready?

    UCA0TXBUF = UCA0RXBUF;                  // TX -> RXed character

    break;

  case 4:break;                             // Vector 4 - TXIFG

  default: break;

  }

}

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