请问。在设计
FPGA程序时,谁遇到过如下的警告啊: One or more signals are missing in the process sensi
tivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:SRAM.
一周热门 更多>