modesim_altera不是已经集成altera的IP核，两天了，还没找到解决办法。下面是出错代码，跪求解释？？？
# ** Warning: (vsim-3534) [FOFIR] - Failed to open file "./source/pika.hex" for reading.
#
# No such file or directory. (errno = ENOENT)    : E:/sofeware/modelsim_ase/win32aloem/../altera/verilog/src/altera_mf.v(783)
#    time: 0 ps  Iteration: 0  Instance: /vga_module_vlg_tst/i1/U3/altsyncram_component/genblk1/altsyncram_inst
# ERROR: cannot read ./source/pika.hex.
# ** Warning: (vsim-7) Failed to open readmem file "./source/pika.ver" in read mode.
#
# No such file or directory. (errno = ENOENT)    : E:/sofeware/modelsim_ase/win32aloem/../altera/verilog/src/altera_mf.v(48091)
#    Time: 0 ps  Iteration: 0  Instance: /vga_module_vlg_tst/i1/U3/altsyncram_component/genblk1/altsyncram_inst
#  Note : Cyclone IV E PLL locked to incoming clock
# Time: 90000  Instance: vga_module_vlg_tst.i1.U1.altpll_component.cycloneiii_pll.pll3