library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
en
tity cymometer is
port ( sysclk : in std_logic; --10MHZ频率输入
clkin : in std_logic; --待测频率信号输入
seg7:out std_logic_vector(6 downto 0); --7段显示控制信号(abcdefg)
scan:out std_logic_vector(7 downto 0)); --数码管地址选择信号
end;
architecture one of cymometer is
signal cnt:std_logic_vector (24 downto 0);
signal clk_cnt:std_logic;
signal cntp1,cntp2,cntp3,cntp4,cntp5,cntp6,cntp7,cntp8:std_logic_vector (3 downto 0);
signal cntq1,cntq2,cntq3,cntq4,cntq5,cntq6,cntq7,cntq8:std_logic_vector (3 downto 0);
signal dat:std_logic_vector(3 downto 0);
begin
-------------0.5HZ分频--------------------------
process (sysclk)
begin
if sysclk'event and sysclk='1' then
if cnt=19999999 then clk_cnt <=not clk_cnt;cnt <=(others=>'0');
else cnt<=cnt+1;end if;
end if;
end process;
-------------1s内计数----------------------------
process (clkin)
begin
if clkin'event and clkin='1' then
if clk_cnt='1' then
if cntp1="1001" then cntp1<="0000";
if cntp2="1001" then cntp2<="0000";
if cntp3="1001" then cntp3<="0000";
if cntp4="1001" then cntp4<="0000";
if cntp5="1001" then cntp5<="0000";
if cntp6="1001" then cntp6<="0000";
if cntp7="1001" then cntp7<="0000";
if cntp8="1001" then cntp8<="0000";
else cntp8<=cntp8+1; end if;
else cntp7<=cntp7+1; end if;
else cntp6<=cntp6+1; end if;
else cntp5<=cntp5+1; end if;
else cntp4<=cntp4+1; end if;
else cntp3<=cntp3+1; end if;
else cntp2<=cntp2+1; end if;
else cntp1<=cntp1+1; end if;
else
if (cntp1/="0000" or cntp2/="0000" or cntp3/="0000" or cntp4/="0000" or ---对计数值锁存
cntp5/="0000" or cntp6/="0000" or cntp7/="0000" or cntp8/="0000")
then
cntq1<=cntp1;cntq2<=cntp2;cntq3<=cntp3;cntq4<=cntp4;
cntq5<=cntp5;cntq6<=cntp6;cntq7<=cntp7;cntq8<=cntp8;
cntp1<="0000";cntp2<="0000";cntp3<="0000";cntp4<="0000";
cntp5<="0000";cntp6<="0000";cntp7<="0000";cntp8<="0000";
end if;
end if;
end if;
end process;
process(cnt(15 downto 13),cntq1,cntq2,cntq3,cntq4,cntq5,cntq6,cntq7,cntq8,dat)
begin
case cnt(15 downto 13) is
when "000"=>scan<="00000001";dat<=cntq1;
when "001"=>scan<="00000010";dat<=cntq2;
when "010"=>scan<="00000100";dat<=cntq3;
when "011"=>scan<="00001000";dat<=cntq4;
when "100"=>scan<="00010000";dat<=cntq5;
when "101"=>scan<="00100000";dat<=cntq6;
when "110"=>scan<="01000000";dat<=cntq7;
when "111"=>scan<="10000000";dat<=cntq8;
when others =>null;
end case;
end process;
process(dat)
begin
case dat is
when "0000" =>seg7 <= "1111110";
when "0001" =>seg7 <= "0110000";
when "0010" =>seg7 <="1101101";
when "0011" =>seg7 <="1111001";
when "0100" =>seg7 <="0110011";
when "0101" =>seg7 <="1011011";
when "0110" =>seg7 <="1011111";
when "0111" =>seg7 <="1110000";
when "1000" =>seg7 <="1111111";
when "1001" =>seg7 <= "1111011";
when others =>null;
end case;
end process;
end ;
不是移位吧
3个二进制构成8个状态
我就是不明白为什么从15到13 为什么不是24到22 或则其他
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