Kinn_Alo 发表于 2013-5-22 11:55
建议，贴点代码什么的

用QUARTUS II12.0编点小程序library ieee;use ieee.std_logic_1164.all;
entity bcd_decoder is
port(i:in std_logic_vector(3 downto 0);
     y:out std_logic_vector(3 downto 0));
end;
architecture one of bcd_decoder is
begin
process(i)
begin
  case i is
     when"0000"=>y<="11111100";
          when"0001"=>y<="01100000";
          when"0010"=>y<="11011010";
          when"0011"=>y<="11110010";
          when"0100"=>y<="01100110";
          when"0101"=>y<="10110110";
          when"0110"=>y<="10111110";
          when"0111"=>y<="11100000";
          when"1000"=>y<="11111110";
          when"1001"=>y<="11110110";
     when"1010"=>y<="11101110";
     when"1011"=>y<="00111110";
          when"1100"=>y<="10011100";
          when"1101"=>y<="01111010";
          when"1110"=>y<="10011110";
          when"1111"=>y<="10001110";
          when others=>y<="11111111";
         end case;
end process;
end;
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cnt4 is
port(clk:in std_logic;
     rst:in std_logic;
          en:in std_logic;
          q:out std_logic_vector(3 downto 0));
end;
architecture one of cnt4 is
    signal q1:std_logic_vector(3 downto 0);
begin
Process(clk,en,rst)
begin
if en='1'then
      if rst='1'then q1<="0000";
                elsif clk'event and clk='1' then
                   q1<=q1+1;
        end if;
end if;
end process;
q<=q1;
end;