本帖最后由 数码小叶 于 2014-12-9 09:03 编辑
写了一个5969双通道的AD程序,A2和A3通道轮流采样,但采集到的A2通道是错误的,A3通道没数据,程序如下:
void ADC12_init()
{
ADC12CTL0 = ADC12SHT0_5 | ADC12ON; //设置采样时间,开启中断
ADC12CTL1 |= ADC12SHP;
ADC12CTL2 |= ADC12RES_2; //12位分辨率
while(REFCTL0 & REFGENBUSY); //开启参考电压,2.5v
REFCTL0 |= REFVSEL_2 | REFON;
}
void start_ADC12()
{
//A2通道
ADC12IER0 |= ADC12IE0; //开中断
ADC12MCTL0 |= ADC12INCH_2| ADC12VRSEL_2; //选择通道2,参考电压2.5v
ADC12CTL0 |= ADC12ENC | ADC12SC; //转换使能,开始转换
while(ADC12CTL1&ADC12BUSY!=0);//判断是否转换完毕
ADC12CTL0 &= ~(ADC12ENC | ADC12SC); //关转换使能,停止转换
ADC12IER0 &= ~ADC12IE0; //关中断
//A3通道
ADC12IER0 |= ADC12IE1;
ADC12MCTL1 |= ADC12INCH_3| ADC12VRSEL_2; ;
ADC12CTL0 |= ADC12ENC | ADC12SC;
while(ADC12CTL1&ADC12BUSY!=0);
ADC12CTL0 &= ~(ADC12ENC | ADC12SC);
ADC12IER0 &= ~ADC12IE1;
}
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = ADC12_VECTOR
__interrupt void ADC12_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(ADC12IV, ADC12IV_ADC12RDYIFG))
{
case ADC12IV_NONE: break; // Vector 0: No interrupt
case ADC12IV_ADC12OVIFG: break; // Vector 2: ADC12MEMx Overflow
case ADC12IV_ADC12TOVIFG: break; // Vector 4: Conversion time overflow
case ADC12IV_ADC12HIIFG: break; // Vector 6: ADC12BHI
case ADC12IV_ADC12LOIFG: break; // Vector 8: ADC12BLO
case ADC12IV_ADC12INIFG: break; // Vector 10: ADC12BIN
case ADC12IV_ADC12IFG0: // Vector 12: ADC12MEM0 Interrupt
result= ADC12MEM0;
break;
case ADC12IV_ADC12IFG1:
result1= ADC12MEM0;
__bic_SR_register_on_exit(LPM0_bits);
break;
case ADC12IV_ADC12IFG2: break; // Vector 16: ADC12MEM2
case ADC12IV_ADC12IFG3: break; // Vector 18: ADC12MEM3
case ADC12IV_ADC12IFG4: break; // Vector 20: ADC12MEM4
case ADC12IV_ADC12IFG5: break; // Vector 22: ADC12MEM5
case ADC12IV_ADC12IFG6: break; // Vector 24: ADC12MEM6
case ADC12IV_ADC12IFG7: break; // Vector 26: ADC12MEM7
case ADC12IV_ADC12IFG8: break; // Vector 28: ADC12MEM8
case ADC12IV_ADC12IFG9: break; // Vector 30: ADC12MEM9
case ADC12IV_ADC12IFG10: break; // Vector 32: ADC12MEM10
case ADC12IV_ADC12IFG11: break; // Vector 34: ADC12MEM11
case ADC12IV_ADC12IFG12: break; // Vector 36: ADC12MEM12
case ADC12IV_ADC12IFG13: break; // Vector 38: ADC12MEM13
case ADC12IV_ADC12IFG14: break; // Vector 40: ADC12MEM14
case ADC12IV_ADC12IFG15: break; // Vector 42: ADC12MEM15
case ADC12IV_ADC12IFG16: break; // Vector 44: ADC12MEM16
case ADC12IV_ADC12IFG17: break; // Vector 46: ADC12MEM17
case ADC12IV_ADC12IFG18: break; // Vector 48: ADC12MEM18
case ADC12IV_ADC12IFG19: break; // Vector 50: ADC12MEM19
case ADC12IV_ADC12IFG20: break; // Vector 52: ADC12MEM20
case ADC12IV_ADC12IFG21: break; // Vector 54: ADC12MEM21
case ADC12IV_ADC12IFG22: break; // Vector 56: ADC12MEM22
case ADC12IV_ADC12IFG23: break; // Vector 58: ADC12MEM23
case ADC12IV_ADC12IFG24: break; // Vector 60: ADC12MEM24
case ADC12IV_ADC12IFG25: break; // Vector 62: ADC12MEM25
case ADC12IV_ADC12IFG26: break; // Vector 64: ADC12MEM26
case ADC12IV_ADC12IFG27: break; // Vector 66: ADC12MEM27
case ADC12IV_ADC12IFG28: break; // Vector 68: ADC12MEM28
case ADC12IV_ADC12IFG29: break; // Vector 70: ADC12MEM29
case ADC12IV_ADC12IFG30: break; // Vector 72: ADC12MEM30
case ADC12IV_ADC12IFG31: break; // Vector 74: ADC12MEM31
case ADC12IV_ADC12RDYIFG: break; // Vector 76: ADC12RDY
default: break;
}
}
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