只能输出两路pwm,请问怎么输出4路pwm,不会改了
#include<msp430f5529.h>
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; //关看门狗
TA0CTL=TASSEL0+TACLR+MC0; //ACLK为时钟源,清TAR,增计数模式
TA0CCR0=512-1; //设定PWM周期
TA0CCTL1=OUTMOD_7; //CCR1输出为resett模式
TA0CCR1=384; //CCR1的PWM占空比设定
TA0CCTL2=OUTMOD_7; //CCR2输出为resett模式
TA0CCR2=8; //CCR2的PWM占空比设定
P1DIR|=0X0c; //P1.2、P1.3输出,对应TA1,TA2
P1SEL|=0X0c; //TA1,TA2输出功能
while(1);
}
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小平头技术问答
P3DIR |= BIT5+BIT6; // P3.5-7.6 outputs
P5SEL |= BIT7; // P5.7 option select
P5DIR |= BIT7; // P5.7 outputs
P7SEL |= BIT4+BIT5+BIT6; // P7.4-7.6 option select
P7DIR |= BIT4+BIT5+BIT6; // P7.4-7.6 outputs
TBCCR0 = 512-1; // PWM Period
TBCCTL1 = OUTMOD_7; // CCR1 reset/set
TBCCR1 = 383; // CCR1 PWM Duty Cycle
TBCCTL2 = OUTMOD_7; // CCR2 reset/set
TBCCR2 = 128; // CCR2 PWM duty cycle
TBCCTL3 = OUTMOD_7; // CCR3 reset/set
TBCCR3 = 64; // CCR3 PWM duty cycle
TBCCTL4 = OUTMOD_7; // CCR4 reset/set
TBCCR4 = 32; // CCR4 PWM duty cycle
TBCCTL5 = OUTMOD_7; // CCR5 reset/set
TBCCR5 = 16; // CCR5 PWM duty cycle
TBCCTL6 = OUTMOD_7; // CCR6 reset/set
TBCCR6 = 8; // CCR6 PWM duty cycle
TBCTL = TBSSEL_2+MC_1; // SMCLK, upmode
TB 和TA是一样配置PWM
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