使用此程序后是这个结果：ACLK = REFO = 32.768kHz, MCLK = SMCLK = Default 1MHz include <msp430f5529.h> void main(void)
{
  volatile unsigned int i;   WDTCTL = WDTPW+WDTHOLD;                   // Stop WDT
  P1DIR |= BIT1;                            // P1.1 output   P1DIR |= BIT0;                            // ACLK set out to pins
  P1SEL |= BIT0;                           
  P2DIR |= BIT2;                            // SMCLK set out to pins
  P2SEL |= BIT2;                           
  P7DIR |= BIT7;                            // MCLK set out to pins
  P7SEL |= BIT7;                                while(1)
  {
    P1OUT ^= BIT1;
    __delay_cycles(60000);                  // Delay
  }
} 但问题是为什么会有这个结果呢?ACLK = REFO = 32.768kHz, MCLK = SMCLK = Default 1MHz (字节限制，只好分开提问了) 此帖出自小平头技术问答