用的是MSP430G2553 管脚上没有TA0.2,不像TA1那样。但是貌似论坛上有人说每路TA都能产生两路PWM波,好奇之余试试···结果没成功。以下是程序:
#include <msp430g2553.h>
void main( void )
{
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;
//时钟设置为1MHz mclk=smclk=dco
BCSCTL1 = CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
BCSCTL3 |= LFXT1S_2;
BCSCTL2 |=SELM_1 + DIVM_0;
//初始化TA0为两通道pwm,smclk
P1DIR |= (BIT1+BIT2);
P1SEL |= (BIT1+BIT2);
TA0CCR2 = 2000;
TA0CCTL0 = OUTMOD_7;
TA0CCTL1 = OUTMOD_7;
TA0CCR0 = 200;
TA0CCR1 = 1000;
TA0CTL = TASSEL_2 + MC_1;
_BIS_SR(LPM0_bits); //进入LPM0低功耗模式
}
额··没出波形···是不是PWM波周期设置只认CCR0??对哦 没看到哪里可以设置说周期可以设置为CCR1或者CCR2·····那怎么过TA0输出两路PWM呢??膜拜高手解答·······阿弥陀佛····
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小平头技术问答
原则上讲是可以六路的,因为每个定时器都有三个独立的比较匹配寄存器,每个比较匹配寄存器都可以独立输出一路PWM,但是TA0.2的管脚没有引出来,所以最多只能是5路,在continue up mode下每个比较匹配控制寄存器的输出模式选择mode4,不解释,上代码!
// ACLK = n/a, MCLK = SMCLK = TACLK = default DCO ~1MHz
// As coded and assuming ~1MHz DCO, toggle rates are:
//output 5 different PWM in different IO
//timer is work on continue up mode
//open all timer_cap interrupt
#include<msp430g2553.h>
void main(void)
{
DCO_init(1);
WDTCTL=WDTPW+WDTHOLD;
P1SEL|=BIT1+BIT2+BIT5;
P1DIR|=BIT1+BIT2+BIT5;
P2SEL|=BIT0+BIT1+BIT2+BIT3+BIT4+BIT5;
P2DIR|=BIT0+BIT1+BIT2+BIT3+BIT4+BIT5;
P1OUT=0X00;
TA0CCTL0|=OUTMOD_4+CCIE;
TA0CCTL1|=OUTMOD_4+CCIE;
//TA0CCTL2|=OUTMOD_7;
TA0CTL|=MC_2+TASSEL_2;
//TA0CCR0=100;
//TA0CCR1=50;
//TA0CCR2=2500;
TA1CCTL0|=OUTMOD_4+CCIE;
TA1CCTL1|=OUTMOD_4+CCIE;
TA1CCTL2|=OUTMOD_4+CCIE;
TA1CTL|=MC_2+TASSEL_2;
//TA1CCR0=700;
//TA1CCR1=100;
//TA1CCR2=300;
__enable_interrupt();
//LPM0;
}
#pragma vector=TIMER0_A0_VECTOR
__interrupt void timer0_ov(void)
{
TA0CCR0+=100;
}
#pragma vector=TIMER0_A1_VECTOR
__interrupt void timer0_cap1(void)
{
switch(TA0IV)
{
case TA0IV_TACCR1:
TA0CCR1+=150;
break;
case TA0IV_TACCR2:
//TA0CCR2=200;
break;
case TA0IV_TAIFG:break;
default: break;
}
}
#pragma vector=TIMER1_A0_VECTOR
__interrupt void timer1_ov(void)
{
TA1CCR0+=700;
}
#pragma vector=TIMER1_A1_VECTOR
__interrupt void timer1_cap1(void)
{
switch(TA1IV)
{
case TA1IV_TACCR1:
TA1CCR1+=100;
break;
case TA1IV_TACCR2:
TA1CCR2+=300;
break;
case TA1IV_TAIFG:break;
default: break;
}
}
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