allegropcb

2019-07-17 08:16发布

这个是什么意思?我要怎么解决这个问题?
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蜗蜗牛
2019-07-17 09:06
检查danging lines、via时出现Report methodology:
  - Dangling lines have at least one end not connected.
  - Dangling vias have one or no connection
      - Plus are not a test, thieving or netshort property via.
  - Antenna vias do not have connections on their start and end layers.
      - Plus they are not a thieving vias.
      - Optionally, VOLTAGE nets, testvias and through vias can be suppressed with
        the environment variable report_antennavia.
      - Section may be suppressed by variable report_noantennavia.
  - Not part of the current partition.
  - To suppress items in dangle report add the OK_DANGLE property to the via
    or connect line.


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