LABVIEW 2014 FPGA xilinx TOOls 编译报错是因为没有密钥引起的吗

2019-07-17 09:02发布

麻烦问下大家编译工具的密钥在哪里弄的?用临时版(安装时选择无密钥)的能正常编译吗?
我的是LBAVIEW2014   CRIO9035  电脑WIN7  64位   编译器是(Vivado 2013.4)版本的。编译时报错如下,求大神指导。拜谢!

labview FPGA:  由于Xilinx错误,编译失败。


Details:
ERROR: [Synth 8-1031] knidmahighspeedsinkbase is not declared [C:/NIFPGA/jobs/G13d07A_hS3S0q5/PkgShimSwitchedLinkDmaPortifc.vhd:295]
ERROR: [Synth 8-1031] knidmahighspeedsinksize is not declared [C:/NIFPGA/jobs/G13d07A_hS3S0q5/PkgShimSwitchedLinkDmaPortIfc.vhd:296]
ERROR: [Synth 8-1031] knidmahighspeedsinkbase is not declared [C:/NIFPGA/jobs/G13d07A_hS3S0q5/PkgShimSwitchedLinkDmaPortIfc.vhd:301]
ERROR: [Synth 8-1031] knidmahighspeedsinkbase is not declared [C:/NIFPGA/jobs/G13d07A_hS3S0q5/PkgShimSwitchedLinkDmaPortIfc.vhd:302]
INFO: [Synth 8-2810] unit pkgshimswitchedlinkdmaportifc ignored due to previous errors [C:/NIFPGA/jobs/G13d07A_hS3S0q5/PkgShimSwitchedLinkDmaPortIfc.vhd:68]
---------------------------------------------------------------------------------
Finished RTL Elaboration : Time (s): cpu = 00:00:04 ; elapsed = 00:00:08 . Memory (MB): peak = 275.949 ; gain = 129.598
---------------------------------------------------------------------------------
ERROR: [Common 17-39] 'source' failed due to earlier errors.
INFO: [Common 17-83] Releasing license: Synthesis
3 Infos, 0 Warnings, 0 Critical Warnings and 4 Errors encountered.
synth_design failed
::ERROR: [Common 17-39] 'source' failed due to earlier errors.


    while executing
"source -notrace {./.Xil/Vivado-9720-/realtime oplevel_gen.tcl}"
    invoked from within
"synth_design -top "toplevel_gen" -part "xc7k70tfbg676-1" -flatten_hierarchy "full""
    (file "C:/NIFPGA/jobs/G13d07A_hS3S0q5/synthesize.tcl" line 20)
    invoked from within
"source "C:/NIFPGA/jobs/G13d07A_hS3S0q5/synthesize.tcl""
# exit
INFO: [Common 17-206] Exiting Vivado at Sat Dec 29 08:56:13 2018...




Compilation Time
---------------------------
Date submitted: 2018-12-29 8:55
Date results were retrieved: 2018-12-29 8:56
Time waiting in queue: 00:17
Time compiling: 00:16
- Generate Xilinx IP: 00:07
- Synthesize - Vivado: 00:05

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1条回答
fanB
2019-07-17 11:46
这个有一定可能是编译器安装的问题 建议楼主重装一下编译器

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