NXP

(转)Cortex-M3 (NXP LPC1788)之启动代码分析

2019-07-12 12:46发布

站内文章 / NXP MCU
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在Keil uVision4中新建一个基于NXP1788的工程后，会提示添加启动汇编代码startup_LPC177x_8x.S。该文件进行从汇编到C语言运行环境的初始化工作。   [cpp]
  1. ;/*****************************************************************************
  2. ; * @file:    startup_LPC177x_8x.s
  3. ; * @purpose: CMSIS Cortex-M3 Core Device Startup File
  4. ; *           for the NXP LPC177x_8x Device Series
  5. ; * @version: V1.20
  6. ; * @date:    07. October 2010
  7. ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
  8. ; *
  9. ; * Copyright (C) 2010 ARM Limited. All rights reserved.
  10. ; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
  11. ; * processor based microcontrollers.  This file can be freely distributed
  12. ; * within development tools that are supporting such ARM based processors.
  13. ; *
  14. ; * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  15. ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  16. ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  17. ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  18. ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  19. ; *
  20. ; *****************************************************************************/ 
  21.  
  22.  
  23. ; Stack Configuration 
  24. ;   Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 
  25. ;  
  26.  
  27. Stack_Size      EQU     0x00000200 
  28.  
  29.                 AREA    STACK, NOINIT, READWRITE, ALIGN=3 
  30. Stack_Mem       SPACE   Stack_Size 
  31. __initial_sp 
  32.  
  33.  
  34. ; Heap Configuration 
  35. ;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 
  36. ;  
  37.  
  38. Heap_Size       EQU     0x00000400 
  39.  
  40.                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3 
  41. __heap_base 
  42. Heap_Mem        SPACE   Heap_Size 
  43. __heap_limit 
  44.  
  45.  
  46.                 PRESERVE8 
  47.                 THUMB 
  48.  
  49.  
  50. ; Vector Table Mapped to Address 0 at Reset 
  51.  
  52.                 AREA    RESET, DATA, READONLY 
  53.                 EXPORT  __Vectors 
  54.  
  55. __Vectors       DCD     __initial_sp              ; Top of Stack 
  56.                 DCD     Reset_Handler             ; Reset Handler 
  57.                 DCD     NMI_Handler               ; NMI Handler 
  58.                 DCD     HardFault_Handler         ; Hard Fault Handler 
  59.                 DCD     MemManage_Handler         ; MPU Fault Handler 
  60.                 DCD     BusFault_Handler          ; Bus Fault Handler 
  61.                 DCD     UsageFault_Handler        ; Usage Fault Handler 
  62.                 DCD     0                         ; Reserved 
  63.                 DCD     0                         ; Reserved 
  64.                 DCD     0                         ; Reserved 
  65.                 DCD     0                         ; Reserved 
  66.                 DCD     SVC_Handler               ; SVCall Handler 
  67.                 DCD     DebugMon_Handler          ; Debug Monitor Handler 
  68.                 DCD     0                         ; Reserved 
  69.                 DCD     PendSV_Handler            ; PendSV Handler 
  70.                 DCD     SysTick_Handler           ; SysTick Handler 
  71.  
  72.                 ; External Interrupts 
  73.                 DCD     WDT_IRQHandler            ; 16: Watchdog Timer 
  74.                 DCD     TIMER0_IRQHandler         ; 17: Timer0 
  75.                 DCD     TIMER1_IRQHandler         ; 18: Timer1 
  76.                 DCD     TIMER2_IRQHandler         ; 19: Timer2 
  77.                 DCD     TIMER3_IRQHandler         ; 20: Timer3 
  78.                 DCD     UART0_IRQHandler          ; 21: UART0 
  79.                 DCD     UART1_IRQHandler          ; 22: UART1 
  80.                 DCD     UART2_IRQHandler          ; 23: UART2 
  81.                 DCD     UART3_IRQHandler          ; 24: UART3 
  82.                 DCD     PWM1_IRQHandler           ; 25: PWM1 
  83.                 DCD     I2C0_IRQHandler           ; 26: I2C0 
  84.                 DCD     I2C1_IRQHandler           ; 27: I2C1 
  85.                 DCD     I2C2_IRQHandler           ; 28: I2C2 
  86.                 DCD     SPIFI_IRQHandler          ; 29: SPIFI 
  87.                 DCD     SSP0_IRQHandler           ; 30: SSP0 
  88.                 DCD     SSP1_IRQHandler           ; 31: SSP1 
  89.                 DCD     PLL0_IRQHandler           ; 32: PLL0 Lock (Main PLL) 
  90.                 DCD     RTC_IRQHandler            ; 33: Real Time Clock 
  91.                 DCD     EINT0_IRQHandler          ; 34: External Interrupt 0 
  92.                 DCD     EINT1_IRQHandler          ; 35: External Interrupt 1 
  93.                 DCD     EINT2_IRQHandler          ; 36: External Interrupt 2 
  94.                 DCD     EINT3_IRQHandler          ; 37: External Interrupt 3 
  95.                 DCD     ADC_IRQHandler            ; 38: A/D Converter 
  96.                 DCD     BOD_IRQHandler            ; 39: Brown-Out Detect 
  97.                 DCD     USB_IRQHandler            ; 40: USB 
  98.                 DCD     CAN_IRQHandler            ; 41: CAN 
  99.                 DCD     DMA_IRQHandler            ; 42: General Purpose DMA 
  100.                 DCD     I2S_IRQHandler            ; 43: I2S 
  101.                 DCD     ENET_IRQHandler           ; 44: Ethernet 
  102.                 DCD     MCI_IRQHandler            ; 45: SD/MMC card I/F 
  103.                 DCD     MCPWM_IRQHandler          ; 46: Motor Control PWM 
  104.                 DCD     QEI_IRQHandler            ; 47: Quadrature Encoder Interface 
  105.                 DCD     PLL1_IRQHandler           ; 48: PLL1 Lock (USB PLL) 
  106.                 DCD     USBActivity_IRQHandler    ; 49: USB Activity interrupt to wakeup 
  107.                 DCD     CANActivity_IRQHandler    ; 50: CAN Activity interrupt to wakeup 
  108.                 DCD     UART4_IRQHandler          ; 51: UART4 
  109.                 DCD     SSP2_IRQHandler           ; 52: SSP2 
  110.                 DCD     LCD_IRQHandler            ; 53: LCD 
  111.                 DCD     GPIO_IRQHandler           ; 54: GPIO 
  112.                 DCD     PWM0_IRQHandler           ; 55: PWM0 
  113.                 DCD     EEPROM_IRQHandler         ; 56: EEPROM 
  114.  
  115.  
  116.                 IF      :LNOT::DEF:NO_CRP 
  117.                 AREA    |.ARM.__at_0x02FC|, CODE, READONLY 
  118. CRP_Key         DCD     0xFFFFFFFF 
  119.                 ENDIF 
  120.  
  121.  
  122.                 AREA    |.text|, CODE, READONLY 
  123.  
  124.  
  125. ; Reset Handler 
  126.  
  127. Reset_Handler   PROC 
  128.                 EXPORT  Reset_Handler             [WEAK] 
  129.                 IMPORT  SystemInit 
  130.                 IMPORT  __main 
  131.                 LDR     R0, =SystemInit 
  132.                 BLX     R0 
  133.                 LDR     R0, =__main 
  134.                 BX      R0 
  135.                 ENDP 
  136.  
  137.  
  138. ; Dummy Exception Handlers (infinite loops which can be modified) 
  139.  
  140. NMI_Handler     PROC 
  141.                 EXPORT  NMI_Handler               [WEAK] 
  142.                 B       . 
  143.                 ENDP 
  144. HardFault_Handler 
  145.                 PROC 
  146.                 EXPORT  HardFault_Handler         [WEAK] 
  147.                 B       . 
  148.                 ENDP 
  149. MemManage_Handler 
  150.                 PROC 
  151.                 EXPORT  MemManage_Handler         [WEAK] 
  152.                 B       . 
  153.                 ENDP 
  154. BusFault_Handler 
  155.                 PROC 
  156.                 EXPORT  BusFault_Handler          [WEAK] 
  157.                 B       . 
  158.                 ENDP 
  159. UsageFault_Handler 
  160.                 PROC 
  161.                 EXPORT  UsageFault_Handler        [WEAK] 
  162.                 B       . 
  163.                 ENDP 
  164. SVC_Handler     PROC 
  165.                 EXPORT  SVC_Handler               [WEAK] 
  166.                 B       . 
  167.                 ENDP 
  168. DebugMon_Handler 
  169.                 PROC 
  170.                 EXPORT  DebugMon_Handler          [WEAK] 
  171.                 B       . 
  172.                 ENDP 
  173. PendSV_Handler  PROC 
  174.                 EXPORT  PendSV_Handler            [WEAK] 
  175.                 B       . 
  176.                 ENDP 
  177. SysTick_Handler PROC 
  178.                 EXPORT  SysTick_Handler           [WEAK] 
  179.                 B       . 
  180.                 ENDP 
  181.  
  182. Default_Handler PROC 
  183.  
  184.                 EXPORT  WDT_IRQHandler            [WEAK] 
  185.                 EXPORT  TIMER0_IRQHandler         [WEAK] 
  186.                 EXPORT  TIMER1_IRQHandler         [WEAK] 
  187.                 EXPORT  TIMER2_IRQHandler         [WEAK] 
  188.                 EXPORT  TIMER3_IRQHandler         [WEAK] 
  189.                 EXPORT  UART0_IRQHandler          [WEAK] 
  190.                 EXPORT  UART1_IRQHandler          [WEAK] 
  191.                 EXPORT  UART2_IRQHandler          [WEAK] 
  192.                 EXPORT  UART3_IRQHandler          [WEAK] 
  193.                 EXPORT  PWM1_IRQHandler           [WEAK] 
  194.                 EXPORT  I2C0_IRQHandler           [WEAK] 
  195.                 EXPORT  I2C1_IRQHandler           [WEAK] 
  196.                 EXPORT  I2C2_IRQHandler           [WEAK] 
  197.                 EXPORT  SPIFI_IRQHandler          [WEAK] 
  198.                 EXPORT  SSP0_IRQHandler           [WEAK] 
  199.                 EXPORT  SSP1_IRQHandler           [WEAK] 
  200.                 EXPORT  PLL0_IRQHandler           [WEAK] 
  201.                 EXPORT  RTC_IRQHandler            [WEAK] 
  202.                 EXPORT  EINT0_IRQHandler          [WEAK] 
  203.                 EXPORT  EINT1_IRQHandler          [WEAK] 
  204.                 EXPORT  EINT2_IRQHandler          [WEAK] 
  205.                 EXPORT  EINT3_IRQHandler          [WEAK] 
  206.                 EXPORT  ADC_IRQHandler            [WEAK] 
  207.                 EXPORT  BOD_IRQHandler            [WEAK] 
  208.                 EXPORT  USB_IRQHandler            [WEAK] 
  209.                 EXPORT  CAN_IRQHandler            [WEAK] 
  210.                 EXPORT  DMA_IRQHandler            [WEAK] 
  211.                 EXPORT  I2S_IRQHandler            [WEAK] 
  212.                 EXPORT  ENET_IRQHandler           [WEAK] 
  213.                 EXPORT  MCI_IRQHandler            [WEAK] 
  214.                 EXPORT  MCPWM_IRQHandler          [WEAK] 
  215.                 EXPORT  QEI_IRQHandler            [WEAK] 
  216.                 EXPORT  PLL1_IRQHandler           [WEAK] 
  217.                 EXPORT  USBActivity_IRQHandler    [WEAK] 
  218.                 EXPORT  CANActivity_IRQHandler    [WEAK] 
  219.                 EXPORT  UART4_IRQHandler          [WEAK] 
  220.                 EXPORT  SSP2_IRQHandler           [WEAK] 
  221.                 EXPORT  LCD_IRQHandler            [WEAK] 
  222.                 EXPORT  GPIO_IRQHandler           [WEAK] 
  223.                 EXPORT  PWM0_IRQHandler           [WEAK] 
  224.                 EXPORT  EEPROM_IRQHandler         [WEAK] 
  225.  
  226. WDT_IRQHandler 
  227. TIMER0_IRQHandler 
  228. TIMER1_IRQHandler 
  229. TIMER2_IRQHandler 
  230. TIMER3_IRQHandler 
  231. UART0_IRQHandler 
  232. UART1_IRQHandler 
  233. UART2_IRQHandler 
  234. UART3_IRQHandler 
  235. PWM1_IRQHandler 
  236. I2C0_IRQHandler 
  237. I2C1_IRQHandler 
  238. I2C2_IRQHandler 
  239. SPIFI_IRQHandler             
  240. SSP0_IRQHandler 
  241. SSP1_IRQHandler 
  242. PLL0_IRQHandler 
  243. RTC_IRQHandler 
  244. EINT0_IRQHandler 
  245. EINT1_IRQHandler 
  246. EINT2_IRQHandler 
  247. EINT3_IRQHandler 
  248. ADC_IRQHandler 
  249. BOD_IRQHandler 
  250. USB_IRQHandler 
  251. CAN_IRQHandler 
  252. DMA_IRQHandler 
  253. I2S_IRQHandler 
  254. ENET_IRQHandler 
  255. MCI_IRQHandler           
  256. MCPWM_IRQHandler 
  257. QEI_IRQHandler 
  258. PLL1_IRQHandler 
  259. USBActivity_IRQHandler 
  260. CANActivity_IRQHandler 
  261. UART4_IRQHandler 
  262. SSP2_IRQHandler 
  263. LCD_IRQHandler 
  264. GPIO_IRQHandler 
  265. PWM0_IRQHandler 
  266. EEPROM_IRQHandler 
  267.  
  268.                 B       . 
  269.  
  270.                 ENDP 
  271.  
  272.  
  273.                 ALIGN 
  274.  
  275.  
  276. ; User Initial Stack & Heap 
  277.  
  278.                 IF      :DEF:__MICROLIB 
  279.  
  280.                 EXPORT  __initial_sp 
  281.                 EXPORT  __heap_base 
  282.                 EXPORT  __heap_limit 
  283.  
  284.                 ELSE 
  285.  
  286.                 IMPORT  __use_two_region_memory 
  287.                 EXPORT  __user_initial_stackheap 
  288. __user_initial_stackheap 
  289.  
  290.                 LDR     R0, =  Heap_Mem 
  291.                 LDR     R1, =(Stack_Mem + Stack_Size) 
  292.                 LDR     R2, = (Heap_Mem +  Heap_Size) 
  293.                 LDR     R3, = Stack_Mem 
  294.                 BX      LR 
  295.  
  296.                 ALIGN 
  297.  
  298.                 ENDIF 
  299.  
  300.  
  301.                 END 
;/***************************************************************************** ; * @file: startup_LPC177x_8x.s ; * @purpose: CMSIS Cortex-M3 Core Device Startup File ; * for the NXP LPC177x_8x Device Series ; * @version: V1.20 ; * @date: 07. October 2010 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; * Copyright (C) 2010 ARM Limited. All rights reserved. ; * ARM Limited (ARM) is supplying this software for use with Cortex-M3 ; * processor based microcontrollers. This file can be freely distributed ; * within development tools that are supporting such ARM based processors. ; * ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. ; * ; *****************************************************************************/ ; Stack Configuration ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; Stack_Size EQU 0x00000200 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; Heap Configuration ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; Heap_Size EQU 0x00000400 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WDT_IRQHandler ; 16: Watchdog Timer DCD TIMER0_IRQHandler ; 17: Timer0 DCD TIMER1_IRQHandler ; 18: Timer1 DCD TIMER2_IRQHandler ; 19: Timer2 DCD TIMER3_IRQHandler ; 20: Timer3 DCD UART0_IRQHandler ; 21: UART0 DCD UART1_IRQHandler ; 22: UART1 DCD UART2_IRQHandler ; 23: UART2 DCD UART3_IRQHandler ; 24: UART3 DCD PWM1_IRQHandler ; 25: PWM1 DCD I2C0_IRQHandler ; 26: I2C0 DCD I2C1_IRQHandler ; 27: I2C1 DCD I2C2_IRQHandler ; 28: I2C2 DCD SPIFI_IRQHandler ; 29: SPIFI DCD SSP0_IRQHandler ; 30: SSP0 DCD SSP1_IRQHandler ; 31: SSP1 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL) DCD RTC_IRQHandler ; 33: Real Time Clock DCD EINT0_IRQHandler ; 34: External Interrupt 0 DCD EINT1_IRQHandler ; 35: External Interrupt 1 DCD EINT2_IRQHandler ; 36: External Interrupt 2 DCD EINT3_IRQHandler ; 37: External Interrupt 3 DCD ADC_IRQHandler ; 38: A/D Converter DCD BOD_IRQHandler ; 39: Brown-Out Detect DCD USB_IRQHandler ; 40: USB DCD CAN_IRQHandler ; 41: CAN DCD DMA_IRQHandler ; 42: General Purpose DMA DCD I2S_IRQHandler ; 43: I2S DCD ENET_IRQHandler ; 44: Ethernet DCD MCI_IRQHandler ; 45: SD/MMC card I/F DCD MCPWM_IRQHandler ; 46: Motor Control PWM DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL) DCD USBActivity_IRQHandler ; 49: USB Activity interrupt to wakeup DCD CANActivity_IRQHandler ; 50: CAN Activity interrupt to wakeup DCD UART4_IRQHandler ; 51: UART4 DCD SSP2_IRQHandler ; 52: SSP2 DCD LCD_IRQHandler ; 53: LCD DCD GPIO_IRQHandler ; 54: GPIO DCD PWM0_IRQHandler ; 55: PWM0 DCD EEPROM_IRQHandler ; 56: EEPROM IF :LNOT::DEF:NO_CRP AREA |.ARM.__at_0x02FC|, CODE, READONLY CRP_Key DCD 0xFFFFFFFF ENDIF AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WDT_IRQHandler [WEAK] EXPORT TIMER0_IRQHandler [WEAK] EXPORT TIMER1_IRQHandler [WEAK] EXPORT TIMER2_IRQHandler [WEAK] EXPORT TIMER3_IRQHandler [WEAK] EXPORT UART0_IRQHandler [WEAK] EXPORT UART1_IRQHandler [WEAK] EXPORT UART2_IRQHandler [WEAK] EXPORT UART3_IRQHandler [WEAK] EXPORT PWM1_IRQHandler [WEAK] EXPORT I2C0_IRQHandler [WEAK] EXPORT I2C1_IRQHandler [WEAK] EXPORT I2C2_IRQHandler [WEAK] EXPORT SPIFI_IRQHandler [WEAK] EXPORT SSP0_IRQHandler [WEAK] EXPORT SSP1_IRQHandler [WEAK] EXPORT PLL0_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT EINT0_IRQHandler [WEAK] EXPORT EINT1_IRQHandler [WEAK] EXPORT EINT2_IRQHandler [WEAK] EXPORT EINT3_IRQHandler [WEAK] EXPORT ADC_IRQHandler [WEAK] EXPORT BOD_IRQHandler [WEAK] EXPORT USB_IRQHandler [WEAK] EXPORT CAN_IRQHandler [WEAK] EXPORT DMA_IRQHandler [WEAK] EXPORT I2S_IRQHandler [WEAK] EXPORT ENET_IRQHandler [WEAK] EXPORT MCI_IRQHandler [WEAK] EXPORT MCPWM_IRQHandler [WEAK] EXPORT QEI_IRQHandler [WEAK] EXPORT PLL1_IRQHandler [WEAK] EXPORT USBActivity_IRQHandler [WEAK] EXPORT CANActivity_IRQHandler [WEAK] EXPORT UART4_IRQHandler [WEAK] EXPORT SSP2_IRQHandler [WEAK] EXPORT LCD_IRQHandler [WEAK] EXPORT GPIO_IRQHandler [WEAK] EXPORT PWM0_IRQHandler [WEAK] EXPORT EEPROM_IRQHandler [WEAK] WDT_IRQHandler TIMER0_IRQHandler TIMER1_IRQHandler TIMER2_IRQHandler TIMER3_IRQHandler UART0_IRQHandler UART1_IRQHandler UART2_IRQHandler UART3_IRQHandler PWM1_IRQHandler I2C0_IRQHandler I2C1_IRQHandler I2C2_IRQHandler SPIFI_IRQHandler SSP0_IRQHandler SSP1_IRQHandler PLL0_IRQHandler RTC_IRQHandler EINT0_IRQHandler EINT1_IRQHandler EINT2_IRQHandler EINT3_IRQHandler ADC_IRQHandler BOD_IRQHandler USB_IRQHandler CAN_IRQHandler DMA_IRQHandler I2S_IRQHandler ENET_IRQHandler MCI_IRQHandler MCPWM_IRQHandler QEI_IRQHandler PLL1_IRQHandler USBActivity_IRQHandler CANActivity_IRQHandler UART4_IRQHandler SSP2_IRQHandler LCD_IRQHandler GPIO_IRQHandler PWM0_IRQHandler EEPROM_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END 程序完成如下内容的工作：           开辟一块大小为Stack_Size的栈空间；         标号__initial_sp指向栈顶位置；         定义堆空间大小为Heap_Size；         建立中断向量表Vectors，cortex-M3规定起始地址必须存放栈顶地址即__initial_sp，紧接着存放复位入口地址，这样内核复位后就会自动从起始地址的下32位取出复位地址执行复位中断服务函数。         Reset_Handler复位中断函数中先EXPORT声明Reset_Handler的全局性，然后分别执行外部的函数SystemInit和__main。    

下面对汇编程序中的几个关键字做说明：

        AREA伪指令：用于定义代码段和数据段，后跟属性标号。其中“READWRITE”表示可读写，“READONLY”只读属性。根据LPC1788的数据手册描述的存储介质，可知可读写段保持在SRAM区，起始地址为0x1000 0000，代码中的堆栈保存在SRAM空间。只读段保存在Flash区，起始地址为0x0000 0000，代码中的中断向量表保存在Flash空间。 因此可以总结出，在0x0000 0000 存放的是栈顶的地址__initial_sp（即0x1000 0200），在0x0000 0004 存放的是Reset_Handler的地址。 LPCaddresS 图1：LPC1788 地址映射 memoryLPC 图2： debug中 0地址的值0x1000 0200 即栈顶地址， 0x0000 0004 地址值为0x0000 00F9（看反汇编可知该值 即Reset_Handler的入口如下图）。 0XF9           DCD指令：开辟内存空间，中断向量表建立中使用相当于C语言中的函数指针，每个成员都是函数指针，指向各个中断服务函数。             自此分析了LPC1788的启动，主要包括堆栈初始化，和中断向量表的初始化。LPC1788有内部Flash，所以上点从内部Flash启动，内部Flash的起始地址为0x0000 0000，存放栈顶的地址0x1000 0200。 0x0000 0004存放复位中断的入口地址。LPC1788复位后，从0x0000 0004取出复位入口地址，执行中断复位函数，从而跳转到SystemInit和main C语言函数执行。  

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