28335的XINTF接口没有中断设置,初始化配置XINTF模块就可直接使用,数据访问地址格式为Data=(^(volatile Uint16^)(0x4000+ 0x0000)),其中0x4000为基地址,0x0000为偏移地址,^为指针符号*。由此总结xintf接口配置步骤为:
1、设置GPIO为xintf模块。
2、开启xintf时钟。
3、设置xintf模块配置
4、访问或写入xintf地址。
- 外部接口头文件DSP2833x_Xintf.h程序如下
#ifndef DSP2833x_XINTF_H
#define DSP2833x_XINTF_H
#ifdef __cplusplus
extern "C" {
#endif
struct XTIMING_BITS {
Uint16 XWRTRAIL:2;
Uint16 XWRACTIVE:3;
Uint16 XWRLEAD:2;
Uint16 XRDTRAIL:2;
Uint16 XRDACTIVE:3;
Uint16 XRDLEAD:2;
Uint16 USEREADY:1;
Uint16 READYMODE:1;
Uint16 XSIZE:2;
Uint16 rsvd1:4;
Uint16 X2TIMING:1;
Uint16 rsvd3:9;
};
union XTIMING_REG {
Uint32 all;
struct XTIMING_BITS bit;
};
struct XINTCNF2_BITS {
Uint16 WRBUFF:2;
Uint16 CLKMODE:1;
Uint16 CLKOFF:1;
Uint16 rsvd1:2;
Uint16 WLEVEL:2;
Uint16 rsvd2:1;
Uint16 HOLD:1;
Uint16 HOLDS:1;
Uint16 HOLDAS:1;
Uint16 rsvd3:4;
Uint16 XTIMCLK:3;
Uint16 rsvd4:13;
};
union XINTCNF2_REG {
Uint32 all;
struct XINTCNF2_BITS bit;
};
struct XBANK_BITS {
Uint16 BANK:3;
Uint16 BCYC:3;
Uint16 rsvd:10;
};
union XBANK_REG {
Uint16 all;
struct XBANK_BITS bit;
};
struct XRESET_BITS {
Uint16 XHARDRESET:1;
Uint16 rsvd1:15;
};
union XRESET_REG {
Uint16 all;
struct XRESET_BITS bit;
};
struct XINTF_REGS {
union XTIMING_REG XTIMING0;
Uint32 rsvd1[5];
union XTIMING_REG XTIMING6;
union XTIMING_REG XTIMING7;
Uint32 rsvd2[2];
union XINTCNF2_REG XINTCNF2;
Uint32 rsvd3;
union XBANK_REG XBANK;
Uint16 rsvd4;
Uint16 XREVISION;
Uint16 rsvd5[2];
union XRESET_REG XRESET;
};
extern volatile struct XINTF_REGS XintfRegs;
#ifdef __cplusplus
}
#endif
#endif
- XINTF配置文件DSP2833x_Xintf.c程序如下
// TI File $Revision: /main/5 $
// Checkin $Date: August 16, 2007 11:06:26 $
//###########################################################################
//
// FILE: DSP2833x_Xintf.c
//
// TITLE: DSP2833x Device 外部接口初始化 & 支持函数.
//
// DESCRIPTION:
//
// Example initialization function for the external interface (XINTF).
// This example configures the XINTF to its default state. For an
// example of how this function being used refer to the
// examples/run_from_xintf project.
//
//###########################################################################
// $TI Release: DSP2833x/DSP2823x C/C++ Header Files V1.31 $
// $Release Date: August 4, 2009 $
//###########################################################################
#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP2833x Examples Include File
//---------------------------------------------------------------------------
// InitXINTF:
//---------------------------------------------------------------------------
// 改函数将外部接口初始化至默认的复位状态.
//
// Do not modify the timings of the XINTF while running from the XINTF. Doing
// so can yield unpredictable results
void InitXintf(void)
{
// 这显示了如何写XINTF寄存器。
// 这里使用了重置后的默认状态值。
// 不同的硬件需要不同的配置。
// 为INTF配置一个例子,在如下目录
// F28335 eZdsp, refer to the examples/run_from_xintf project.
// 任何更改XINTF配置只能从XINTF扩展之外的区域运行代码。
// 所有区域---------------------------------
// 所有区域的基准时间时钟为 XTIMCLK = 1/2 SYSCLKOUT
EALLOW
SysCtrlRegs.PCLKCR3.bit.XINTFENCLK = 1
XintfRegs.XINTCNF2.bit.XTIMCLK = 1
XintfRegs.XINTCNF2.bit.WRBUFF = 0
XintfRegs.XINTCNF2.bit.CLKOFF = 1
XintfRegs.XINTCNF2.bit.CLKMODE = 1
XintfRegs.XTIMING0.bit.XWRLEAD = 2
XintfRegs.XTIMING0.bit.XWRACTIVE = 5
XintfRegs.XTIMING0.bit.XWRTRAIL = 2
// Zone read timing
XintfRegs.XTIMING0.bit.XRDLEAD = 2
XintfRegs.XTIMING0.bit.XRDACTIVE = 5
XintfRegs.XTIMING0.bit.XRDTRAIL = 2
// double all Zone read/write lead/active/trail timing
XintfRegs.XTIMING0.bit.X2TIMING = 1
// Zone will sample XREADY signal
XintfRegs.XTIMING0.bit.USEREADY = 0
XintfRegs.XTIMING0.bit.READYMODE = 1
XintfRegs.XTIMING0.bit.XSIZE = 3
//
//片外ram访问
//
XintfRegs.XTIMING6.bit.XWRLEAD = 3
XintfRegs.XTIMING6.bit.XWRACTIVE = 7
XintfRegs.XTIMING6.bit.XWRTRAIL = 3
// Zone read timing` `
XintfRegs.XTIMING6.bit.XRDLEAD = 3
XintfRegs.XTIMING6.bit.XRDACTIVE = 7
XintfRegs.XTIMING6.bit.XRDTRAIL = 3
// double all Zone read/write lead/active/trail timing
XintfRegs.XTIMING6.bit.X2TIMING = 1
// Zone will sample XREADY signal
XintfRegs.XTIMING6.bit.USEREADY = 0
XintfRegs.XTIMING6.bit.READYMODE = 1
XintfRegs.XTIMING6.bit.XSIZE = 3
// Zone 7------------------------------------
XintfRegs.XTIMING7.bit.XWRLEAD = 3
XintfRegs.XTIMING7.bit.XWRACTIVE = 7
XintfRegs.XTIMING7.bit.XWRTRAIL = 3
// Zone read timing
XintfRegs.XTIMING7.bit.XRDLEAD = 3
XintfRegs.XTIMING7.bit.XRDACTIVE = 7
XintfRegs.XTIMING7.bit.XRDTRAIL = 3
// double all Zone read/write lead/active/trail timing
XintfRegs.XTIMING7.bit.X2TIMING = 1
// Zone will sample XREADY signal
XintfRegs.XTIMING7.bit.USEREADY = 0
XintfRegs.XTIMING7.bit.READYMODE = 1
// Size must be either:
XintfRegs.XTIMING7.bit.XSIZE = 3
// Bank switching
XintfRegs.XBANK.bit.BANK = 0
XintfRegs.XBANK.bit.BCYC = 7
EDIS
//Force a pipeline flush to ensure that the write to
//the last register configured occurs before returning.
// InitXintf32Gpio()
// asm(" RPT #7 || NOP")
}
//===========================================================================
// No more.
//===========================================================================
- 参考资料
《手把手教你学DSP:基于TMS320F28335》
《TMS320F28335DSP原理与开发编程》
《28335接口扩展 (XINTF) 参考指南》