DSP2812的CMD文件例子C2000例程
C3000例程
C5000例程
C6000例程
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DSP2812的CMD文件例子 热 【字体：小 大】
DSP2812的CMD文件例子
作者：佚名 文章来源：本站原创 点击数： 2419 更新时间：2005-11-29
MEMORY
{
PAGE 0: /* Program Memory */
ZONE0 : origin = 0x002000, length = 0x002000 /* XINTF zone 0
*/
ZONE1 : origin = 0x004000, length = 0x002000 /* XINTF zone 1
*/
RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM
block L0 */
ZONE2 : origin = 0x080000, length = 0x080000 /* XINTF zone 2
*/
ZONE6 : origin = 0x100000, length = 0x080000 /* XINTF zone 6
*/
OTP : origin = 0x3D7800, length = 0x000800 /* on-chip OTP
*/
FLASHJ : origin = 0x3D8000, length = 0x002000 /* on-chip FLASH
*/
FLASHI : origin = 0x3DA000, length = 0x002000 /* on-chip FLASH
*/
FLASHH : origin = 0x3DC000, length = 0x004000 /* on-chip FLASH
*/
FLASHG : origin = 0x3E0000, length = 0x004000 /* on-chip FLASH
*/
FLASHF : origin = 0x3E4000, length = 0x004000 /* on-chip FLASH
*/
FLASHE : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH
*/
FLASHD : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH
*/
FLASHC : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH
*/
FLASHA : origin = 0x3F6000, length = 0x002000 /* on-chip FLASH
*/
BEGIN : origin = 0x3F8000, length = 0x000002 /* Part of H0.
Used for "boot to H0" bootloader mode. */
PRAMH0 : origin = 0x3F8002, length = 0x001FFE /*0xFFE /*
portion of H0 we've mapped to PAGE 0 */
/* ZONE7 : origin = 0x3FC000, length = 0x003FC0 /* XINTF zone 7
available if MP/MCn=1 */
ROM : origin = 0x3FF000, length = 0x000FC0 /* boot ROM
available if MP/MCn=0 */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot
ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot
ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
PAGE 1 : /* Data Memory */
RAMM0 : origin = 0x000000, length = 0x000400 /* on-chip RAM
block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM
block M1 */
DEV_EMU : origin = 0x000880, length = 0x000180 /* device
emulation registers */
FLASH_REGS : origin = 0x000A80, length = 0x000060 /* FLASH
registers */
CSM : origin = 0x000AE0, length = 0x000010 /* code security
module registers */
XINTF : origin = 0x000B20, length = 0x000020 /* external
interface registers */
CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0
registers (CPU Timer1 and Timer2 are reserved for BIOS)*/
PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control
registers */
PIE_VECT : origin = 0x000D00, length = 0x000100 /* PIE vector
table */
ECAN_A : origin = 0x006000, length = 0x000100 /* eCAN
registers */
ECAN_AMBOX : origin = 0x006100, length = 0x000100 /* eCAN
mailboxes */
SYSTEM : origin = 0x007010, length = 0x000020 /* System
control registers */
SPI_A : origin = 0x007040, length = 0x000010 /* SPI registers
*/
SCI_A : origin = 0x007050, length = 0x000010 /* SCI-A
registers */
XINTRUPT : origin = 0x007070, length = 0x000010 /* external
interrupt registers */
GPIOMUX : origin = 0x0070C0, length = 0x000020 /* GPIO mux
registers */
GPIODAT : origin = 0x0070E0, length = 0x000020 /* GPIO data
registers */
ADC : origin = 0x007100, length = 0x000020 /* ADC registers
*/
EV_A : origin = 0x007400, length = 0x000040 /* Event Manager
A registers */
EV_B : origin = 0x007500, length = 0x000040 /* Event Manager
B registers */
SCI_B : origin = 0x007750, length = 0x000010 /* SCI-B
registers */
MCBSP_A : origin = 0x007800, length = 0x000040 /* McBSP
registers */
RAML1 : origin = 0x009000, length = 0x001000 /* on-chip RAM
block L1 */
FLASHB : origin = 0x3F4000, length = 0x002000 /* on-chip FLASH
*/
CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* CSM password
locations in FLASHA */
DRAMH0 : origin = 0x3f9000, length = 0x001000 /* portion of H0
we've mapped to PAGE 1 */
}
SECTIONS
{
/*** Compiler Required Sections ***/
.text : > PRAMH0, PAGE = 0
.cinit : > PRAMH0, PAGE = 0
.stack : > RAMM1, PAGE = 1
.bss : > RAMM0, PAGE = 1
.ebss : > RAMM0, PAGE = 1
.const : > RAMM0, PAGE = 1
.econst : > RAMM0, PAGE = 1
.sysmem : > RAMM1, PAGE = 1
.reset : > RESET, PAGE = 0, TYPE = DSECT /* we are
not using the .reset section */
/*** User Defined Sections ***/
codestart : > BEGIN, PAGE = 0 /* Used by
file DSP28_CodeStartBranch.asm */
/*** Peripheral Frame 0 Register Structures ***/
DevEmuRegsFile : > DEV_EMU, PAGE = 1
FlashRegsFile : > FLASH_REGS, PAGE = 1
CsmRegsFile : > CSM, PAGE = 1
XintfRegsFile : > XINTF, PAGE = 1
CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1
PieVectTable : > PIE_VECT, PAGE = 1
/*** Peripheral Frame 1 Register Structures ***/
SysCtrlRegsFile : > SYSTEM, PAGE = 1
SpiaRegsFile : > SPI_A, PAGE = 1
SciaRegsFile : > SCI_A, PAGE = 1
XIntruptRegsFile : > XINTRUPT, PAGE = 1
GpioMuxRegsFile : > GPIOMUX, PAGE = 1
GpioDataRegsFile : > GPIODAT PAGE = 1
AdcRegsFile : > ADC, PAGE = 1
EvaRegsFile : > EV_A, PAGE = 1
EvbRegsFile : > EV_B, PAGE = 1
ScibRegsFile : > SCI_B, PAGE = 1
McbspaRegsFile : > MCBSP_A, PAGE = 1
/*** Peripheral Frame 2 Register Structures ***/
ECanaRegsFile : > ECAN_A, PAGE = 1
ECanaMboxesFile : > ECAN_AMBOX PAGE = 1
/*** Code Security Password Locations ***/
CsmPwlFile : > CSM_PWL, PAGE = 1
}
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