DSP

F28335 eCAP配置代码(自发自检)

2019-07-13 14:58发布

程序的功能是: 1,在 EPWMA1 口发出频率 10K 和 占空比为0.5 的方波 2,在GPIO34口设置捕获功能,检测发出的方波 3,freq 输出检测频率,duty输出检测占空比 main.c部分 #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File #include "DSP2833x_Examples.h" // DSP2833x Examples Include File void ChoseCap(void); void EPwmSetup(); void SetCap1Mode(void); void SetCap2Mode(void); Uint32 t1=0,t2=0,t3=0,t4=0,T1=0,T2=0,t5,t6,t7,t8,T3,T4,i,led=0,freq=0,duty=1,T1_temp=1,T2_temp=1; interrupt void ISRCap1(void); interrupt void ISRCap2(void); void InitCapl(); void main(void) { InitSysCtrl(); InitXintf16Gpio(); //zq DINT; InitPieCtrl(); IER = 0x0000; IFR = 0x0000; InitPieVectTable(); EALLOW; // This is needed to write to EALLOW protected registers PieVectTable. ECAP1_INT = &ISRCap1; // PieVectTable. ECAP2_INT = &ISRCap2; //PieVectTable.XINT13 = &cpu_timer1_isr; //PieVectTable.TINT2 = &cpu_timer2_isr; EDIS; // This is needed to disable write to EALLOW protected registers // EALLOW; GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 0; GpioCtrlRegs.GPADIR.bit.GPIO26= 1; EDIS; GpioDataRegs.GPACLEAR.bit.GPIO26=1; InitCapl(); EPwmSetup(); IER |= M_INT4; //IER |= M_INT13; //IER |= M_INT14; // Enable TINT0 in the PIE: Group 4 interrupt1 PieCtrlRegs.PIEIER4.bit.INTx1 = 1; // PieCtrlRegs.PIEIER4.bit.INTx2 = 1; EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM i=0; for(; ;) { } } interrupt void ISRCap1(void) { // Acknowledge this interrupt to receive more interrupts from group 1 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4; ECap1Regs.ECCLR.all=0xFFFF;//clare all flag led++; t1= ECap1Regs.CAP1; t2= ECap1Regs.CAP2; t3= ECap1Regs.CAP3; t4= ECap1Regs.CAP4; T1=t2-t1;T2=t4-t3; if(led>100) { T1_temp=T1; T2_temp=T2*10; freq = (150000/T1_temp)*1000; duty = (T2_temp/T1_temp)*10; led=0; } } EPWM.c 部分 #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File #include "DSP2833x_Examples.h" // DSP2833x Examples Include File #if (CPU_FRQ_150MHZ) #define CPU_CLK 150e6 #endif #if (CPU_FRQ_100MHZ) #define CPU_CLK 100e6 #endif #define PWM_CLK 10e3 // If diff freq. desired, change freq here. #define SP CPU_CLK/(2*PWM_CLK) #define TBCTLVAL 0x200E // Up-down cnt, timebase = SYSCLKOUT void EPwmSetup() { InitEPwm1Gpio(); // InitEPwm(); // EPwm1Regs.TBSTS.all=0; EPwm1Regs.TBPHS.half.TBPHS=0; //所有相位清零 EPwm1Regs.TBCTR=0; //时基计数器清零 EPwm1Regs.TBPRD = 750; EPwm1Regs.CMPA.half.CMPA = 375; EPwm1Regs.CMPB = 300; EPwm1Regs.TBCTL.bit.CTRMODE = 2; //增计数 EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; //禁止相位控制 EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // 采用影子寄存器模式 EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE; //关闭同步信号 EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0x05; EPwm1Regs.TBCTL.bit.CLKDIV = 0x0; EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // CTR = 0 epwm A 置1 EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; // CTR = CMPA epwm A 置0 EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR; // EPwm1Regs.AQCTLB.all=0; // EPwm1Regs.AQSFRC.all=0; // EPwm1Regs.AQCSFRC.all=0; EPwm1Regs.DBCTL.all=0xb; // EPWMxB is inverted EPwm1Regs.DBRED=0; EPwm1Regs.DBFED=0; EPwm1Regs.TZSEL.all=0; EPwm1Regs.TZCTL.all=0; EPwm1Regs.TZEINT.all=0; EPwm1Regs.TZFLG.all=0; EPwm1Regs.TZCLR.all=0; EPwm1Regs.TZFRC.all=0; EPwm1Regs.ETSEL.all=0; // Interrupt when TBCTR = 0x0000 EPwm1Regs.ETFLG.all=0; EPwm1Regs.ETCLR.all=0; EPwm1Regs.ETFRC.all=0; EPwm1Regs.PCCTL.all=0; }    ECAP.C 部分 // TI File $Revision: /main/7 $ // Checkin $Date: September 20, 2007 13:30:31 $ //########################################################################### // // FILE: DSP2833x_Cap_Init.c // // TITLE: DSP2833x Device System Control Initialization & Support Functions. // // DESCRIPTION: // // Example initialization of system resources. // //########################################################################### // $TI Release: DSP2833x Header Files V1.01 $ // $Release Date: September 26, 2007 $ //########################################################################### #include "DSP2833x_Device.h" // Headerfile Include File #include "DSP2833x_Examples.h" // Examples Include File void ChoseCap(void); void InitECapGpio(); void SetCap1Mode(void); void SetCap2Mode(void); void InitCapl(void); // Functions that will be run from RAM need to be assigned to // a different section. This section will then be mapped to a load and // run address using the linker cmd file. #pragma CODE_SECTION(InitFlash, "ramfuncs"); //--------------------------------------------------------------------------- // InitSysCtrl: //--------------------------------------------------------------------------- // This function initializes the System Control registers to a known state. // - Disables the watchdog // - Set the PLLCR for proper SYSCLKOUT frequency // - Set the pre-scaler for the high and low frequency peripheral clocks // - Enable the clocks to the peripherals void InitCapl(void) { ChoseCap(); InitECap1Gpio(); // InitECap2Gpio(); SetCap1Mode(); // SetCap2Mode(); } void ChoseCap(void) { SysCtrlRegs.PCLKCR1.bit.ECAP1ENCLK=1;//enable clock to Cap1 //SysCtrlRegs.PCLKCR1.bit.ECAP2ENCLK=1; //SysCtrlRegs.PCLKCR1.bit.ECAP3ENCLK=1; //SysCtrlRegs.PCLKCR1.bit.ECAP4ENCLK=1; //SysCtrlRegs.PCLKCR1.bit.ECAP5ENCLK=1; //SysCtrlRegs.PCLKCR1.bit.ECAP6ENCLK=1; } void InitECapGpio() { InitECap1Gpio(); #if (DSP28_ECAP2) InitECap2Gpio(); #endif // endif DSP28_ECAP2 #if (DSP28_ECAP3) InitECap3Gpio(); #endif // endif DSP28_ECAP3 #if (DSP28_ECAP4) InitECap4Gpio(); #endif // endif DSP28_ECAP4 #if (DSP28_ECAP5) InitECap5Gpio(); #endif // endif DSP28_ECAP5 #if (DSP28_ECAP6) InitECap6Gpio(); #endif // endif DSP28_ECAP6 } void InitECap1Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. // GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pull-up on GPIO5 (CAP1) //GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0; // Enable pull-up on GPIO24 (CAP1) GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0; // Enable pull-up on GPIO34 (CAP1) // Inputs are synchronized to SYSCLKOUT by default. // Comment out other unwanted lines. // GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 0; // Synch to SYSCLKOUT GPIO5 (CAP1) //GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 0; // Synch to SYSCLKOUT GPIO24 (CAP1) GpioCtrlRegs.GPBQSEL1.bit.GPIO34 = 0; // Synch to SYSCLKOUT GPIO34 (CAP1) /* Configure eCAP-1 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be eCAP1 functional pins. // Comment out other unwanted lines. // GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 3; // Configure GPIO5 as CAP1 // GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 1; // Configure GPIO24 as CAP1 GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 1; // Configure GPIO24 as CAP1 EDIS; } #if DSP28_ECAP2 void InitECap2Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. // GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pull-up on GPIO7 (CAP2) GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0; // Enable pull-up on GPIO25 (CAP2) // GpioCtrlRegs.GPBPUD.bit.GPIO37 = 0; // Enable pull-up on GPIO37 (CAP2) // Inputs are synchronized to SYSCLKOUT by default. // Comment out other unwanted lines. // GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 0; // Synch to SYSCLKOUT GPIO7 (CAP2) GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 0; // Synch to SYSCLKOUT GPIO25 (CAP2) // GpioCtrlRegs.GPBQSEL1.bit.GPIO37 = 0; // Synch to SYSCLKOUT GPIO37 (CAP2) /* Configure eCAP-2 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be eCAP2 functional pins. // Comment out other unwanted lines. // GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 3; // Configure GPIO7 as CAP2 GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 1; // Configure GPIO25 as CAP2 // GpioCtrlRegs.GPBMUX1.bit.GPIO37 = 3; // Configure GPIO37 as CAP2 EDIS; } #endif // endif DSP28_ECAP2 #if DSP28_ECAP3 void InitECap3Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0; // Enable pull-up on GPIO9 (CAP3) // GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0; // Enable pull-up on GPIO26 (CAP3) // Inputs are synchronized to SYSCLKOUT by default. // Comment out other unwanted lines. GpioCtrlRegs.GPAQSEL1.bit.GPIO9 = 0; // Synch to SYSCLKOUT GPIO9 (CAP3) // GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 0; // Synch to SYSCLKOUT GPIO26 (CAP3) /* Configure eCAP-3 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be eCAP3 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 3; // Configure GPIO9 as CAP3 // GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 1; // Configure GPIO26 as CAP3 EDIS; } #endif // endif DSP28_ECAP3 #if DSP28_ECAP4 void InitECap4Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0; // Enable pull-up on GPIO11 (CAP4) // GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0; // Enable pull-up on GPIO27 (CAP4) // Inputs are synchronized to SYSCLKOUT by default. // Comment out other unwanted lines. GpioCtrlRegs.GPAQSEL1.bit.GPIO11 = 0; // Synch to SYSCLKOUT GPIO11 (CAP4) // GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 0; // Synch to SYSCLKOUT GPIO27 (CAP4) /* Configure eCAP-4 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be eCAP4 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 3; // Configure GPIO11 as CAP4 // GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 1; // Configure GPIO27 as CAP4 EDIS; } #endif // endif DSP28_ECAP4 #if DSP28_ECAP5 void InitECap5Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; // Enable pull-up on GPIO3 (CAP5) // GpioCtrlRegs.GPBPUD.bit.GPIO48 = 0; // Enable pull-up on GPIO48 (CAP5) // Inputs are synchronized to SYSCLKOUT by default. // Comment out other unwanted lines. GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 0; // Synch to SYSCLKOUT GPIO3 (CAP5) // GpioCtrlRegs.GPBQSEL2.bit.GPIO48 = 0; // Synch to SYSCLKOUT GPIO48 (CAP5) /* Configure eCAP-5 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be eCAP5 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2; // Configure GPIO3 as CAP5 // GpioCtrlRegs.GPBMUX2.bit.GPIO48 = 1; // Configure GPIO48 as CAP5 EDIS; } #endif // endif DSP28_ECAP5 #if DSP28_ECAP6 void InitECap6Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; // Enable pull-up on GPIO1 (CAP6) // GpioCtrlRegs.GPBPUD.bit.GPIO49 = 0; // Enable pull-up on GPIO49 (CAP6) // Inputs are synchronized to SYSCLKOUT by default. // Comment out other unwanted lines. GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 0; // Synch to SYSCLKOUT GPIO1 (CAP6) // GpioCtrlRegs.GPBQSEL2.bit.GPIO49 = 0; // Synch to SYSCLKOUT GPIO49 (CAP6) /* Configure eCAP-5 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be eCAP6 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 2; // Configure GPIO1 as CAP6 // GpioCtrlRegs.GPBMUX2.bit.GPIO49 = 1; // Configure GPIO49 as CAP6 EDIS; } #endif // endif DSP28_ECAP6 void SetCap1Mode(void) { ECap1Regs.ECCTL1.bit.CAP1POL = EC_RISING; ECap1Regs.ECCTL1.bit.CAP2POL = EC_RISING; ECap1Regs.ECCTL1.bit.CAP3POL = EC_RISING; ECap1Regs.ECCTL1.bit.CAP4POL = EC_FALLING; ECap1Regs.ECCTL1.bit.CTRRST1 = EC_ABS_MODE; ECap1Regs.ECCTL1.bit.CTRRST2 = EC_ABS_MODE; ECap1Regs.ECCTL1.bit.CTRRST3 = EC_ABS_MODE; ECap1Regs.ECCTL1.bit.CTRRST4 = EC_ABS_MODE; ECap1Regs.ECCTL1.bit.CAPLDEN = EC_ENABLE; ECap1Regs.ECCTL1.bit.PRESCALE = EC_DIV1; ECap1Regs.ECCTL2.bit.CAP_APWM = EC_CAP_MODE; ECap1Regs.ECCTL2.bit.CONT_ONESHT = EC_CONTINUOUS; ECap1Regs.ECCTL2.bit.SYNCO_SEL = EC_SYNCO_DIS; ECap1Regs.ECCTL2.bit.SYNCI_EN = EC_DISABLE; ECap1Regs.ECEINT.all=0x0000;//stop all interrupt ECap1Regs.ECCLR.all=0xFFFF;//clare all flag ECap1Regs.ECCTL2.bit.TSCTRSTOP = EC_RUN;// 启动 ECap1Regs.ECEINT.bit.CEVT4=1;// Enable cevt4 interrupt } void SetCap2Mode(void) { ECap2Regs.ECCTL1.bit.CAP1POL = EC_FALLING; ECap2Regs.ECCTL1.bit.CAP2POL = EC_FALLING; ECap2Regs.ECCTL1.bit.CAP3POL = EC_FALLING; ECap2Regs.ECCTL1.bit.CAP4POL = EC_FALLING; ECap2Regs.ECCTL1.bit.CTRRST1 = EC_ABS_MODE; ECap2Regs.ECCTL1.bit.CTRRST2 = EC_ABS_MODE; ECap2Regs.ECCTL1.bit.CTRRST3 = EC_ABS_MODE; ECap2Regs.ECCTL1.bit.CTRRST4 = EC_ABS_MODE; ECap2Regs.ECCTL1.bit.CAPLDEN = EC_ENABLE; ECap2Regs.ECCTL1.bit.PRESCALE = EC_DIV1; ECap2Regs.ECCTL2.bit.CAP_APWM = EC_CAP_MODE; ECap2Regs.ECCTL2.bit.CONT_ONESHT = EC_CONTINUOUS; ECap2Regs.ECCTL2.bit.SYNCO_SEL = EC_SYNCO_DIS; ECap2Regs.ECCTL2.bit.SYNCI_EN = EC_DISABLE; ECap2Regs.ECEINT.all=0x0000;//stop all interrupt ECap2Regs.ECCLR.all=0xFFFF;//clare all flag ECap2Regs.ECCTL2.bit.TSCTRSTOP = EC_RUN;// 启动 ECap2Regs.ECEINT.bit.CEVT4=1;// Enable cevt4 interrupt } //=========================================================================== // End of file. //===========================================================================