下面介绍一些内存保护的例子，即（CPU 或者DMA）访问了受保护（无权限访问）的内存，会通过相应的系统event产生exception，进而交由平台处理该异常。            1，下面的打印是CPU访问（如对Nyquist来说，他有四个corePac，每个corePac都有自己的L2内存，这里的意思是在一个corePac内，CPU在访问L2时，有非法内存访问）了非法内存0x4200，即CPU访问L2时，访问了0x4200，所以根据“TI C66x DSP 系统events及其应用 - 1”中的图，是通过event 0x7C = 124（CPU memory protection fault），来上报给平台的。 FATAL EXCEPTION [0xEA07C]CpuL2MemoryProtectionFault Violated memory address(L2MPFAR):0x00004200 Local access type:supervisor write **            2，DMA访问（即协处理器，也称外设访问了corePac内部的内存，corePac内部的内存有L1D,L1P,L2，外设是独立于各个corePac的，所以当外设访问corePac内部的资源时，会给各个外设设置一个ID号，标示该外设，然后各个corePac只能看到ID号，如这里FID=5就指的四SRIO）了corePac内的非法内存，所以根据“TI C66x DSP 系统events及其应用 - 1”中的图，是通过event 0x79 = 121（DMA memory protection fault），来上报给平台的。 FATAL EXCEPTION [0xEA79]DmaL1PMemoryProtectionFault Violated memory address(L1PMPFAR):0x00E00000 FID:0x05 access type:user read **            下面讲解下在2中，是怎么映射外设到corePac可以接收的FID的。实际上外设访问corePac中的资源是通过corePac内部的硬件EMC实现的（这里外设是master端，corePac内部资源是slave端）。实际上corePac只可以识别16个外设，即只有16个FID（就是图中的AID），下图中说的很详细 "The EMC remaps PrivIDs on inbound ccesses to the smaller set of AIDs that C66x CorePac recognizes". table 6-1的右侧的一列表示寄存器地址。corePac可以设置各个FID对资源的访问权限，从而达到保护的目的（具体要配置Memory Protection Page Attribute Register = L1DMPPAxx，可参考TI C66x corePac文档的 chapter 10，以L1D为例（L2，L1P类似），参考3.7 L1D Memory Protection）。 3.7 L1D Memory Protection： The L1D memory controllers feature two exception outputs that are routed to the C66x interrupt controller(L1D内存控制器输出两个exception到corePac的中断控制器INTC). One of these exception outputs indicates that a DSP-triggered: “local” memory exception (L1D_CMPA) occurred（CPU访问corePac内部L1D资源）. The other indicates that a system master-triggered “remote” exception (L1D_DMPA) occurred（外设DMA访问corePac内部L1D资源）. The C66x memory protection architecture divides the DSP internal memory (L1P,L1D, L2) into pages. Each page has an associated set of permissions.  摘自TI C66x corePac文档： 可以做下述映射： * maps the PrivIDs (system masters) to a smaller set of   AIDs (Allowed IDs). These IDs are used when specifying different  access sets for L1D, L1P and L2  memory protection. This function  is called used only by DSP HWAPI internally. This function maps the default settings of PrivIDs to AIDs. For Kepler, this default  mapping can be changed .This function does NOT apply to Faraday. *     /* Map CGEM0 to AID0 */
    cgemRegsPtr->PAMAP0 = (u32)(EAidValues_AID0);  //=0     /* Map CGEM1 to AID1 */
    cgemRegsPtr->PAMAP1 = (u32)(EAidValues_AID1); //=1     /* Map CGEM2 to AID2 */
    cgemRegsPtr->PAMAP2 = (u32)(EAidValues_AID2); //=2     /* Map CGEM3 to AID3 */
    cgemRegsPtr->PAMAP3 = (u32)(EAidValues_AID3); //=3     /* Map AIF to AIDX */
    cgemRegsPtr->PAMAP4 = (u32)(EAidValues_AIDX); //=7     /* Map TAC to AIDX */
    cgemRegsPtr->PAMAP5 = (u32)(EAidValues_AIDX);     /* Map RAC to AID4 */
    cgemRegsPtr->PAMAP6 = (u32)(EAidValues_AID4); //=4     /* Map FFTC to AIDX */
    cgemRegsPtr->PAMAP7 = (u32)(EAidValues_AIDX);     /* Map PA_SS to AIDX */
    cgemRegsPtr->PAMAP8 = (u32)(EAidValues_AIDX);     /* Map SRIO to AID5 */
    cgemRegsPtr->PAMAP9 = (u32)(EAidValues_AID5); //=5     /* Map QM to AIDX */
    cgemRegsPtr->PAMAP10 = (u32)(EAidValues_AIDX);     /* Map PCIe to AIDX */
    cgemRegsPtr->PAMAP11 = (u32)(EAidValues_AIDX);     /* Map DAP to AIDX */
    cgemRegsPtr->PAMAP12 = (u32)(EAidValues_AIDX);     /* Map reserved PrivID to AIDX */
    cgemRegsPtr->PAMAP13 = (u32)(EAidValues_AIDX);     /* Map reserved PrivID to AIDX */
    cgemRegsPtr->PAMAP14 = (u32)(EAidValues_AIDX);     /* Map TE_SS to AIDX */
    cgemRegsPtr->PAMAP15 = (u32)(EAidValues_AIDX);