DSP

UART通信程序-中断方式

2019-07-13 16:24发布


UART通信程序,附带自己定义的协议


uart.c #include "_ffmc16.h" #include "uart.h" /** UART protocol **/ /* HEAD LENGTH CMD DATA BBC AA N=1+n 1 X1~Xn verify = ~(CMD+DATA) */ UCHAR rx_count; /* rx counter */ UCHAR tx_count; /* rx counter */ UCHAR data_rx[RX_LEN]; /* store reception data */ UCHAR data_tx[TX_LEN]; /* store transmission data*/ volatile UCHAR tmp; UCHAR ok[] = "OK:"; UCHAR er[] = "ER:"; /*********************************************************** Function : uart_init Description : uart init Parameter : void Return : void Date : 2014.3.15 Authot : Puls ************************************************************/ void uart_init() { IO_ICR.word = 0x6501; // usart0 rx (101) "level 1" IO_ICR.word = 0x6601; // usart0 tx (102) "level 1" IO_UART0.SMR0.byte = 0x04; // UART reset IO_UART0.SMR0.bit.MD = 0x0; // Asynchro MoDe Enable : MD = 0 IO_UART0.SCR0.byte = 0x14; // error flag clear, 8bit data , no parity, 1 stop bit IO_UART0.ESCR0.byte = 0x00; // Synch_UART0 normal mode IO_UART0.ECCR0.byte = 0x00; // Synch_UART0 normal mode /************* baud rate set ***************************************/ // baund rate generator IO_UART0.BGR0.word = 34; /* v = [Φ / b] - 1*/ /********************************************************************/ IO_UART0.SMR0.bit.SCKE = 0; // Synchro MoDe : Clock disable IO_UART0.SMR0.bit.SOE = 1; // Serial Output Enable IO_UART0.SCR0.bit.TXE = 0; // tx disable // IO_EIER0.bit.LBSOIE=0; // tx interrupt disable IO_UART0.SSR0.bit.TIE=0; // tx interrupt disable IO_UART0.SCR0.bit.RXE = 0; // rx disable IO_UART0.SSR0.bit.RIE = 0; // rx interrupt disable } /*********************************************************** Function : usart_rx_interrupt Description : uart reception interrupt Parameter : void Return : void Date : 2014.3.15 Authot : Puls ************************************************************/ __interrupt void usart_rx_interrupt(void) { UCHAR data_head; if((IO_UART0.SSR0.bit.ORE == 1 ) || (IO_UART0.SSR0.bit.FRE == 1)) { IO_UART0.SCR0.byte = 0x16; /* error flag clear */ tmp = IO_UART0.SSR0.byte; /* dummy read access */ uart_tx(er); } else { data_rx[rx_count] = IO_UART0.RDR0; /* Interrupt flag clear first */ tmp = IO_UART0.SSR0.byte; /* dummy read access */ rx_count++; if(data_rx[0] == DATA_HEAD) /* head of data compare with DATA_HEAD */ { if(data_rx[1]+3 == rx_count) { IO_UART0.SCR0.bit.RXE = 0; /* rx disable */ verification(); /* data of reception verify */ rx_count = 0; } } else { tmp = IO_UART0.SSR0.byte; /* dummy read access */ } } } /*********************************************************** Function : usart_tx_interrupt Description : uart transmission interrupt Parameter : void Return : void Date : 2014.3.24 Authot : Puls ************************************************************/ __interrupt void usart_tx_interrupt(void) { if(tx_count < strlen(data_tx)) { IO_UART0.RDR0 = data_tx[tx_count]; /* Int flag clear */ tmp = IO_UART0.SSR0.byte; /* dummy read access */ tx_count++; } else { tx_flag = FALSE; enable_tx(DISABLE); enable_rx(ENABLE); } } /*********************************************************** Function : usart_rx Description : uart reception data Parameter : str[] is reception data Return : void Date : 2014.3.24 Authot : Puls ************************************************************/ void uart_tx(UCHAR str[]) { UCHAR i; UCHAR n; for(i=0; i

uart.h #ifndef _UART_H #define _UART_H #define LOW 0 #define HIGH 1 #define ENABLE 1 #define DISABLE 0 #define RX_LEN 30 /* */ #define TX_LEN 100 /* */ #define DATA_HEAD 0xAA /* head of data */ #define TRUE 1 #define FALSE 0 typedef unsigned char UCHAR; typedef unsigned int UINT; void uart_init(); void uart_data_init(); void enable_tx(UCHAR en); void enable_rx(UCHAR en); void uart_tx(UCHAR str[]); void data_analyze(); void verification(); extern __interrupt void usart_rx_interrupt(void); extern __interrupt void usart_tx_interrupt(void); #endif