DSP

初试bfin-uclinux-08r1.5-rc3的SMP支持

2019-07-13 17:26发布

站内文章 / DSP
13010 0 1192
  快乐虾 http://blog.csdn.net/lights_joy/ lights@hb165.com    本文适用于 ADI bf561 DSP 优视科技BV561EVB开发板 uClinux-2008r1.5-rc3   欢迎转载，但请保留作者信息     Bfin-uclinux的内核从08r1.5-rc3开始支持SMP，今天试着编译了一个内核，下面是个记录。 首先将bfin_patch/smp_patch/smp_bf561.patch文件复制到uclinux内核的根目录下，执行： patch -p0 < ./smp_bf561.patch 将此补丁打上。 接着make menuconfig，选上驱动，再make，用u-boot引导： Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) Memory available: 57660k/65536k RAM, (4772k init code, 1036k kernel code, 421k data, 1024k dma, 620k reserved) Blackfin Scratchpad data SRAM: 4 KB PDA for CPU0 reserved at ffb00000 Blackfin DATA_A SRAM: 16 KB Blackfin DATA_B SRAM: 16 KB Blackfin Instruction SRAM: 16 KB Mount-cache hash table entries: 512 CoreB bootstrap code to SRAM ff600000 via DMA. Booting Core B. Instruction Cache Enabled for CPU1 Data Cache Enabled for CPU1 (write-through) PDA for CPU1 reserved at ff700000 Brought up 2 CPUs SMP: Total of 2 processors activated (1171.45 BogoMIPS). migration_cost=4000 NET: Registered protocol family 16 Blackfin GPIO Controller Blackfin DMA Controller ezkit_init(): registering device resources NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 2, 24576 bytes) TCP bind hash table entries: 2048 (order: 2, 16384 bytes) TCP: Hash tables configured (established 2048 bind 2048) TCP reno registered io scheduler noop registered io scheduler anticipatory registered (default) io scheduler cfq registered bfin-wdt: initialized: timeout=20 sec (nowayout=0) Serial: Blackfin serial driver bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 35) is a BFIN-UART RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize PPP generic driver version 2.4.2 SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256). SLIP linefill/keepalive option. dm9000 Ethernet Driver bfin-spi bfin-spi.0: Blackfin BF5xx on-chip SPI Contoller Driver, Version 1.0, regs_base@ffc00500, dma channel@16 i2c /dev entries driver i2c-gpio i2c-gpio.0: using pins 1 (SDA) and 0 (SCL) TCP cubic registered NET: Registered protocol family 1 NET: Registered protocol family 17 Freeing unused kernel memory: 4772k freed dma_alloc_init: dma_page @ 0x00602000 - 256 pages at 0x03f00000                            _____________________________________         a8888b.           / Welcome to the uClinux distribution /        d888888b.         /       _     _                         /        8P"YP"Y88        /       | |   |_|            __  __ (TM)  |        8|o||o|88  _____/        | |    _ ____  _   _ / // /       |        8'    .88       /        | |   | |  _ /| | | | /  /        |        8`._.' Y8.       /       | |__ | | | | | |_| | /  /        |       d/      `8b.       /      /____||_|_| |_|/____|/_//_/       |      dP   .    Y8b.       /   For embedded processors including   |     d8:'  "  `::88b        /    the Analog Devices Blackfin      /    d8"         'Y88b        /___________________________________/   :8P    '      :888    8a.   :     _a88P         For further information, check out:  ._/"Yaa_:   .| 88P|            - http://blackfin.uclinux.org/  /    YP"    `| 8P  `.          - http://docs.blackfin.uclinux.org/  /     /.___.d|    .'           - http://www.uclinux.org/  `--..__)8888P`._.'  jgs/a:f    - http://www.analog.com/blackfin   Have a lot of fun...   BusyBox v1.4.1 (2009-01-10 22:19:59 CST) Built-in shell (msh) Enter 'help' for a list of built-in commands.   root:/> 看一下cpuinfo： root:/> cat /proc/cpuinfo Board Name:     ADDS-BF561-EZKIT Board Memory:   64 MB Kernel Memory:  64 MB MMU:            none FPU:            none System Clock:   118800000 Hz   CPU0:           ADSP-BF561 Rev. 0.5 Core Clock:     594000000 Hz BogoMips:       1171.45 Calibration:    585728000 loops I-CACHE:        ON D-CACHE:        ON (write-through) DBANK-A:        CACHE DBANK-B:        CACHE I-CACHE Size:   16KB D-CACHE Size:   32KB I-CACHE Setup:  4 Sub-banks/4 Ways, 32 Lines/Way D-CACHE Setup:  2 Super-banks/4 Sub-banks/2 Ways, 64 Lines/Way   CPU1:           ADSP-BF561 Rev. 0.5 Core Clock:     594000000 Hz BogoMips:       1171.45 Calibration:    585728000 loops I-CACHE:        ON D-CACHE:        ON (write-through) DBANK-A:        CACHE DBANK-B:        CACHE I-CACHE Size:   16KB D-CACHE Size:   32KB I-CACHE Setup:  4 Sub-banks/4 Ways, 32 Lines/Way D-CACHE Setup:  2 Super-banks/4 Sub-banks/2 Ways, 64 Lines/Way 有意思，有时间得仔细研究一下了。 当然，这个SMP还有一些限制：   This SMP patch was made for 2008R1. Limitations in current work are listed below. 1. Only support the cache policy: WriteThrough. 2. Disabled Memory Optimizations, we moved these functions to SDRAM. 3. Kernel module and applications can't be load into L1 memory, neither alloc data from L1 memory. 4. Not have L2 memory management function, but you can define variables that located in L2. 5. Applications that built with -mstack-check-l1, or calling uClibc's thread manage API may fail. Toolchain guys will work on it. 6. Both the Cores have the same interrupt settings, ie, both the core will response to the peripheral interrupt. Because each vector have a spin lock, except the tick interrupt, so only one Core will do the act things. 7. Use GPTIMER0 instead of the CoreTimer, as the tick timer. 8. Not support power management. 期待下一版的功能更加完善！  

参考资料

uclinux-2008r1(bf561)内核中的per_cpu（2008/5/20）

热门文章