DSP

【DM642学习笔记二】dsp基础实验：发光二级管的显示 led.c

2019-07-13 18:58发布

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1，OSDFPGA配置一个专用的8位寄存器控制指示灯亮灭，访问地址为90080017h，由电路图可知低电平点亮。            【DM642】dsp基础实验：发光二级管的显示 <wbr>led.c【DM642】dsp基础实验：发光二级管的显示 <wbr>led.c 2，程序运行时，可直接editmemory。即修改90080017h地址的值（可在Edit-memory-edit对话框中修改，也可在View memory中直接点击修改），当前指示灯亮灭情况随之改变。程序仍继续运行。 3，BSL的结构及其使用 4，DSP/BIOS程序设计环境 程序如下： #include "c6x.h" #define PROGXOR 1 #define LEDCTLR (*((unsignedchar*)(0x90080017)))  voidInitEMIF();    // 初始化EMIF接口 void Delay(unsigned intnDelay);   // 软件延时子程序   main() {       int i,j;       unsigned int uWork;       while ( 1 )       {              LEDCTLR=0;       // 点亮所有8个指示灯           Delay(1024);   //等待片刻              LEDCTLR=0x0ff;  // 关闭所有8个指示灯              Delay(1024); #ifndef PROGXOR              uWork=1;             // 以下逐个点亮指示灯              for ( i=0;i<8;i++ )              {                     LEDCTLR&=((~uWork)&0x0ff);                     uWork<<=1;                     Delay(1024);              }              uWork=1;             // 以下逐个关闭指示灯              for ( i=0;i<8;i++ )?              {                     LEDCTLR|=uWork;                     uWork<<=1;                     Delay(1024);              } #else              for ( j=0;j<2;j++ )              {                     uWork=1;             // 以下逐个关闭或点亮指示灯                     for ( i=0;i<8;i++ )                     {                            LEDCTLR^=uWork;                            uWork<<=1;                            Delay(1024);                     }              } #endif       } } // 软件延时子程序 void Delay(unsigned intnDelay) {       unsigned int i,j,k=0;              for ( i=0;i              for ( j=0;j<6144;j++ )                     k++; }  // 初始化EMIF接口 void InitEMIF() {   #defineEMIFA_GCTL      0x01800000 #defineEMIFA_CE1       0x01800004 #defineEMIFA_CE0       0x01800008 #defineEMIFA_CE2       0x01800010 #defineEMIFA_CE3       0x01800014 #defineEMIFA_SDRAMCTL  0x01800018 #defineEMIFA_SDRAMTIM  0x0180001c #defineEMIFA_SDRAMEXT  0x01800020 #defineEMIFA_CE1SECCTL  0x01800044 #defineEMIFA_CE0SECCTL  0x01800048 #defineEMIFA_CE2SECCTL  0x01800050 #defineEMIFA_CE3SECCTL  0x01800054          *(int*)EMIFA_GCTL    = 0x00052078;    *(int*)EMIFA_CE0     = 0xffffffd3;     *(int*)EMIFA_CE1     = 0x73a28e01;     *(int*)EMIFA_CE2     = 0x22a28a22;     *(int*)EMIFA_CE3     = 0x22a28a42;     *(int *)EMIFA_SDRAMCTL = 0x57115000;     *(int *)EMIFA_SDRAMTIM = 0x0000081b;     *(int *)EMIFA_SDRAMEXT = 0x001faf4d;     *(int *)EMIFA_CE0SECCTL= 0x00000002;     *(int *)EMIFA_CE1SECCTL= 0x00000002;     *(int *)EMIFA_CE2SECCTL= 0x00000002;     *(int *)EMIFA_CE3SECCTL= 0x00000073;        }    

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