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s5pv210 datasheet_system_power management

2019-07-14 00:53发布

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4 POWER MANAGEMENT
 This chapter describes the Power Management Unit (PMU) in S5PV210. SYSCON manages clock management unit (CMU) and PMU in S5PV210. 本章介绍了电源管理单元（PMU）在S5PV210。系统控制该时钟管理管理单元（CMU）和PMU在S5PV210。

4.1 OVERVIEW OF PMU
Mobile application processors such as the S5PV210 shouldconsume less power, since mobile products have a
small battery with limited power capacity. The purpose of PMU is to provide various methods in S5PV210 to
consume less power under specific application scenarios.
The power management scheme in S5PV210 provides six system power modes, namely,Normal, Idle, Deep-idle,
Stop, Deep-stop, andSleep modes.
 移动应用处理器如S5PV210应该消耗更少的功率，由于移动产品有容量受限的小型电池。PMU的目的是在S5PV210中提供各种方法 在特定的应用场景下消耗更少的功率。 在S5PV210的电源管理方案提供了六个系统的电源模式，即正常，闲置闲置，深，停止，深度停止，睡眠模式。
The description of each power mode is given as follows: 每一个电源模式的描述如下：
• Normal: In this mode, the CPU core is running, that is, the software is running. 正常的：在这种模式下，处理器的核心是运行，也就是说，该软件正在运行。
•Idle: In this mode, the CPU core is idle, that is, the CPU core clock is disabled but the remaining parts of the
S5PV210 are running.
 在这种模式下，处理器核心是空闲的，也就是说，中央处理器的核心时钟被禁用，但S5PV210的其余部分是在运行的。
•Deep-idle: In this mode, the CPU core is power-gated, that is, the CPU core power is supplied, but is
powered off by the internal power switch. The remaining parts of the chip remain the same as those in the
Normal mode, or become power-gated (except Audio power domain for application of low power MP3
playback).
 深空闲：在这种模式下，中央处理器的核心是功率控制的，即处理器核心供电，而是由内部电源开关供电。芯片的其余部分保持相同的那些在 正常模式，或成为电源门控（除音频功率域低功耗MP3的应用回放）。
•Stop: In this mode, the S5PV210 is clock-gated (except RTC module). Therefore, application programming
stops and waits for wakeup event to resume its operation. Also, the CPU core clock is disabled. (Note: The
power-gated block in Normalmode is still power-gated in Stop mode.)
 •停止：在这种模式下，S5PV210是门控时钟（除了RTC模块）。因此，应用程序编程停止并等待唤醒事件恢复操作。此外，中央处理器的核心时钟被禁用。（注： 功率门控阻滞在正常模式下仍然是停止模式下的电源门控。）
•Deep-stop: In this mode, the CPU core and remaining parts of the chip are power-gated (except TOP, RTC,
and ALIVE modules). The TOP module can be power-gated or powered-on.
 •深停止：在这种模式下，CPU核心和芯片的其余部分是电源门控（除顶部，RTC，和活动的模块。顶部模块可以是电源门控或供电。
•Sleep: In this mode, the internal power(VDD_ARM, VDD_INT, VDD_PLL) of the S5PV210 is externally turned
off using regulator or power management IC (PMIC). Therefore, the internal power to S5PV210 is powered
“off” except ALIVE block. (Note: RTC power to RTC and external power to I/O pad is still "on". If wakeup event
occurs, S5PV210 is initialized by wakeup reset, as though power-on reset was asserted.)
 •睡眠：在这种模式下，内部电源（vdd_arm，vdd_int，vdd_pll）的S5PV210是外部转用调节器或电源管理IC（PMIC）。因此，对S5PV210内部电源供电 “关”，除了活动的块。（注：RTC电源RTC和外部电源，I / O板仍然是“开”。如果唤醒事件时，通过唤醒S5PV210复位初始化，虽然上电复位是断言。）
‘Deep’ means CPU core is power-gated. Therefore, leakage power of CPU core is minimized inDeep-idle and
Deep-stop power modes.
 “深”是指中央处理器的核心是功率门控。因此，CPU核泄漏功率最小化在闲置和深停止功率模式。
The above description about power mode is given in view of internal digital logic. For more information on nondigital logic, refer to4.5 "Cortex-A8 Power Mode",4.7 "External Power Control", and4.8 "Internal memory
control".
 在内部数字逻辑的角度给出了功率模式的上述描述。对于非数字逻辑的更多信息，参见“to4.5 Cortex-A8功耗模式”、4.7“外部电源控制”，and4.8“内存管理”。
PMU controls the power mode of SRAM and PLL. However, the power mode of analog IP (except SRAM and
PLL) should be controlled by its corresponding control module.
In addition to the PMU, clock management unit (CMU) also controls the PLL.
 PMU控制SRAM和PLL的电源模式。然而，模拟IP功率模式（除SRAM和锁相环）应控制其相应的控制模块。 此外，PMU，时钟管理单元（CMU）也控制锁相环。

4.2 FUNCTIONAL DESCRIPTION OF PMU
The total power consumption consists of static and dynamic power consumptions. Static power is consumed when
power to a circuit is supplied and there is no active operation in the circuit. On the other hand, dynamic power is
consumed when the signal to a circuit is changing and there are some active operations in the circuit. The static
power consumption is due to leakage current in the process, while dynamic power consumption is due to the
transition of gate state. The dynamic power consumption depends on the operating voltage, operating frequency,
and toggling ratios of the logic gate.
 总功耗包括静态和动态功耗。静态功率消耗是电路的电源被供给，并没有在电路中的主动操作。另一方面，动态功率消耗是 当信号转换为电路时，在电路中有一些活动的操作。静态功率消耗是由于在过程中的漏电流，而动态功耗是由于闸门状态转换。 动态功耗取决于工作电压，工作频率，和切换率的逻辑门。
Various power-saving techniques have been developed, and some of them are shown and compared in Table
4-1.
 各种节能技术已被开发，其中一些显示和比较表4-1。
4.10 REGISTER DESCRIPTION
Do not change any reserved area. Changing value of Reserved area can lead to undefined behavior. 不要更改任何保留区。保留区的值变化可能导致未定义行为。

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