现在网上很难搜到Exynos4412的源码，基本上我没有找到任何资料有过分析DDR3的内存初始化代码的。在看U-Boot的这段代码时，也徘徊了很久，不知道如下手，很多文章或资料都将这一段分析过程有意无意的隐藏掉了，最多也只是提一下说参考裸板的代码，在找不到任何资料的情况下，我只能依靠芯片手册上，三星在内存控制器这一章，写的关于DDR3的初始化顺序的21个步骤来一条一条去读去看，在安静下来看了芯片手册以后，我发现三星给的U-Boot的DDR初始化代码和芯片手册上的初始化步骤完全一致，有的时候，最好的资料其实就在手边，只是我一直在想着找捷径，学习哪有那么多捷径？好好研读手册吧，第18章中有下面一段关于初始化的说明：
图12-1、DDR3初始化步骤说明截图现在开始关注一下芯片手册上关于DDR3的初始化流程，找到手册 1046页，可以看到其有一段关于LPDDR2-S4的初始化步骤，LPDDR2表示低功耗DDR2，DDR3的初始化过程应和这个一样，我们就按这个过程来初始化DDR3：18.3.1 LPDDR2-S4Use the sequence givenhere to initialize LPDDR2 devices. Unless specified otherwise, these steps aremandatory. Note that the memory CK/CKn must be less than or equal to 50 MHzbefore you initialize the LPDDR2-S4 device.1.  DMC must assert and hold CKE to a logic lowlevel to provide stable power for memory device and then apply stable clock.2.  Set the PhyControl0.ctrl_start_point andPhyControl0.ctrl_inc bit-fields to a correct value according to clockfrequency. Set the PhyControl0.ctrl_dll_on bit-field to "1" toactivate the PHY DLL.3.  DQS cleaning: Set the PhyControl1.ctrl_shiftcand PhyControl1.ctrl_offsetc bit-fields to the appropriate value according toclock frequency, board delay, and memory tDQSCK parameter.4.  Set the PhyControl0.ctrl_start bit-field to"1".5.  Set the ConControl. At this moment, anauto-refresh counter should be disabled.6.  Set the MemControl. At this moment, all powerdown modes should be disabled.7.  Set the MemConfig0 register. When there aretwo external memory chips, set the MemConfig1 register.8.  Set the PrechConfig and PwrdnConfigregisters.9.  Set the TimingAref, TimingRow, TimingData,and TimingPower registers according to memory AC parameters.10.  Set the QosControl0 to 15 and QosConfig0 to15 registers when a certain bus master requires QoS scheme.11.  Wait for the PhyStatus0.ctrl_lockedbit-fields to change to "1". Verify whether PHY DLL is locked.PHY DLLcompensates the changes of delay amount that pressure, volume, and temperaturevariation causes during memory operation. Therefore, you should not power offPHY DLL for reliable operation. It can be in power-off mode except when it runsat low frequency. When you use the power-off mode, set thePhyControl0.ctrl_force bit-field to the correct value according to thePhyStatus0.ctrl_lock_value[9:2] bit-field for fix delay amount. Clear thePhyControl0.ctrl_dll_on bit-field to turn off PHY DLL.12.  Set the PhyControl1.fp_resync bit-field to"1" to update DLL information.13.  Confirm that Clock Enable (CKE) is in a logiclow level at least 100ns after power on.14.  Issue a NOP command by using the DirectCmdregister to assert and hold CKE to a logic high level.15.  Wait for a minimum of 200 s.16.  Issue a MRS command by using the DirectCmdregister to reset memory devices and program the operating parameters.17.  Wait for minimum of 1 s.18.  Issue a MRR command by using the DirectCmdregister to poll the DAI bit of the MRStatus register. This is to know whetheror not Device Auto-Initialization is complete.19.  If there are two external memory chips,execute step 14 to 19 for chip1 memory device.20.  Set the ConControl to turn on an auto-refreshcounter.21.  Set MemControl register when you requirepower-down modes.翻译上面的步骤:1、DMC功能必须设置，并且要保持CKE为低电平，以便可以提供稳定的电源和时钟给DDR2、根据时钟频率设置PhyControl0.ctrl_start_point 和 PhyControl0.ctrl_inc bit-fields，并且设置PhyControl0.ctrl_dll_on bit-field为 "1" 已启动PHY DLL。3、DQS 清除，根据时钟频率、板子延时和芯片的tDQSCK参数设置PhyControl1.ctrl_shiftc 和PhyControl1.ctrl_offsetcbit-fields。4、设置 PhyControl0.ctrl_start bit-field为"1"。5、设置ConControl，此时，不能使能自动刷新计数器（auto-refresh counter ）。6. 设置MemControl，此时，所有的power down模式应关闭。7、设置MemConfig0 寄存器，当外面有两片存储芯片时，设置MemConfig1寄存器。8、设置 PrechConfig和 PwrdnConfig寄存器。9、根据DDR3的 AC参数设置TimingAref, TimingRow,TimingData, 和 TimingPower寄存器。10、当总线主控者需要QoS时序参数时，设置QosControl0 到15寄存器和QosConfig0 到 15寄存器。11、等待 PhyStatus0.ctrl_lockedbit-fields 变成 "1"，以确定 PHY DLL 是否锁定。PHY DLL 可以补偿压力、容积和温度等环境的变化，因为在芯片工作期间，我们不能关闭了PHY DLL的电源，只有当他在低的时钟频率时才可以切换到Power-off 模式，当我们用power-off 模式，参考PhyStatus0.ctrl_lock_value[9:2]的延时参数来设置PhyControl0.ctrl_force bit-field，清楚PhyControl0.ctrl_dll_on bit-field来关闭 PHY DLL。12、设置PhyControl1.fp_resync bit-field 为 "1" 来更新 DLL的设置。13、确保在电源上电后至少保持Clock Enable (CKE)在低电平100ns。14、用DirectCmd 寄存器来执行一条NOP指令且保持CKE 为高电平。15、至少等待200us。16、发出MRS指令来重新设置存储芯片的操作参数。17、至少等待1us。18、用MRR指令来查询MRStatus的寄存器的DAI位，用这们来确定自动初始化过程是否完成。19、如果外部有别的存储芯片，重复执行14到19步来设置芯片1。20、设置ConControl来启动auto-refresh counter.21、当我们要进行power-down模式，设置MemControl寄存器。 知道了上面的这些初始化步骤，大家试着去找一下三星给的裸板代码中关于SDRAM的BL1的代码，就比较清楚了。来对照自己板子上的芯片开始设置吧。