"The input clock source to the DSP can be directly used to generate the clocks to other parts of the system (Bypass Mode) or it can be multiplied by a value from 2 to 15 and divided by a value from 1 to 32 to achieve a de...
http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/123812.aspx
Q:
1).- In the two SRIO examples found in the pdk_C6678_1_0_0_11 there is no use of the Response packet Ftype 13. Could you tell me, please, why...