把多行注释去掉后编译就一堆错误，错误提示截图在附件中 哪位高手帮我看看？

//Project : WetarLed_3//Author  : Mr Li//Data    : 2010-09-23//Function://modify  : 2010-09-25////////////////////////////////////////////
module WaterLed_3( ClkIn, Rst_n, LedOut );//端口声明开始
input ClkIn; input Rst_n;output[5:0] LedOut;
wire ClkIn;wire Rst_n;//wire[5:0] LedOut;// 端口声明结束
//内部变量wire Clk;
//reg Clk;  reg[5:0] LedOut;reg[23:0] Cnt;reg[2:0] State;

always @ (posedge ClkIn )  Cnt <= Cnt + 1'b1;/*always @ (negedge Rst_n) begin  if(!Rst_n) begin Cnt = 24'd0; State = 3'd0; LedOut = 6'd0; end end */assign Clk = Cnt[23];
always @ ( posedge Clk ) begin case ( State ) 3'd1 : LedOut <= 6'b111_101; 3'd2 : LedOut <= 6'b111_011; 3'd0 : LedOut <= 6'b111_110; 3'd3 : LedOut <= 6'b110_111; 3'd4 : LedOut <= 6'b101_111; 3'd5 : LedOut <= 6'b011_111; endcase State <= State + 1; if( State == 6 ) State <= 3'd0; end
endmodule
此帖出自小平头技术问答