通过STM32F407定时器2通道3输出PWM

2019-07-20 01:47发布

#include "pwm.h"
#include "key.h"
#include "usart.h"
#include "delay.h"

void TIM2_PWM_Init(u32 arr,u32 psc)
{
//′Ë2¿·ÖDèêÖ¶ˉDT¸ÄIO¿úéèÖÃ

GPIO_InitTypeDef GPIO_InitStructure;
TIM_TimeBaseInitTypeDef  TIM_TimeBaseStructure;
TIM_OCInitTypeDef  TIM_OCInitStructure;

RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2,ENABLE);    //TIM2ê±Öóê1Äü
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA,ENABLE); //ê1Äü¶Ë¿úê±Öó

GPIO_PinAFConfig(GPIOA,GPIO_PinSource2,GPIO_AF_TIM2); //GPIOA2¸′óÃÎa¶¨ê±Æ÷2

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;          //GPIOA2
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;       //¸′óÃ1|Äü
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; //Ëù¶è100MHz
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;    //íÆíì¸′óÃêä3ö
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;       //éÏà-
GPIO_Init(GPIOA,&GPIO_InitStructure);             //3õê¼»ˉPA2

TIM_TimeBaseStructure.TIM_Prescaler=psc;  //¶¨ê±Æ÷·ÖÆμ
TIM_TimeBaseStructure.TIM_CounterMode=TIM_CounterMode_Up; //ÏòéÏ¼ÆêyÄ￡ê½
TIM_TimeBaseStructure.TIM_Period=arr; //×Ô¶ˉÖØ×°ÔØÖμ
TIM_TimeBaseStructure.TIM_ClockDivision=TIM_CKD_DIV1;

TIM_TimeBaseInit(TIM2,&TIM_TimeBaseStructure);//3õê¼»ˉ¶¨ê±Æ÷2

//3õê¼»ˉTIM2 Channel3 PWMÄ￡ê½
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; //Ñ¡Ôñ¶¨ê±Æ÷Ä￡ê½:TIMÂö3å¿í¶èμ÷ÖÆÄ￡ê½2
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; //±è½Ïêä3öê1Äü
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low; //êä3ö¼«DÔ:TIMêä3ö±è½Ï¼«DÔμí
TIM_OC3Init(TIM2, &TIM_OCInitStructure);  //¸ù¾YTÖ¸¶¨μÄ2Îêy3õê¼»ˉíaéèTIM2OC3

TIM_OC3PreloadConfig(TIM2, TIM_OCPreload_Enable);  //ê1ÄüTIM2ÔúCCR1éÏμÄÔ¤×°ÔØ¼Ä′æÆ÷

  TIM_CtrlPWMOutputs(TIM2,ENABLE);
  TIM_ARRPreloadConfig(TIM2, ENABLE);
  TIM_Cmd(TIM2, ENABLE);
}

void Set_Duty_Cycle(u8 key)
{
static u16 duty_cycle = 210;       //static ¶¨òåòaÔú ÆäËüDÎê½μÄ±äá¿¶¨òåÖ®Ç°￡»

switch(key)
{
case 1:
{
if(duty_cycle >= 420)
{
duty_cycle = 420;
}
else
{
duty_cycle += 10;
}
TIM_SetCompare1 (TIM14, duty_cycle);
}
break;

case 2:
{
if(duty_cycle <= 0)
{
duty_cycle = 0 ;
}
else
{
duty_cycle -= 10;
}
TIM_SetCompare1 (TIM14, duty_cycle);
}
break;
}
}

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