STM32

F407加入外部SRAM后串口波特率变低了是什么原因

2019-07-20 05:26发布

站内问答 / STM32/STM8
5634 2 1229
原来115200的波特率加入外部SRAM后波特率变成了57600，程序里面的配置是115200，上位机接收的时候要设置成57600才能接收正确，想知道是有什么地方配置错误了吗？才导致时钟变慢还是有什么地方需要另外配置。下面是system_stm32f4xx.c的配置，屏蔽掉了库自带的FSMC初始化


[mw_shl_code=c,true]void SystemInit_ExtMemCtl(void)
{
/*-- GPIOs Configuration -----------------------------------------------------*/
/*
+-------------------+--------------------+------------------+--------------+
+                       SRAM pins assignment                               +
+-------------------+--------------------+------------------+--------------+
| PD0  <-> FMC_D2  | PE0  <-> FMC_NBL0 | PF0  <-> FMC_A0 | PG0 <-> FMC_A10 |
| PD1  <-> FMC_D3  | PE1  <-> FMC_NBL1 | PF1  <-> FMC_A1 | PG1 <-> FMC_A11 |
| PD4  <-> FMC_NOE | PE3  <-> FMC_A19  | PF2  <-> FMC_A2 | PG2 <-> FMC_A12 |
| PD5  <-> FMC_NWE | PE4  <-> FMC_A20  | PF3  <-> FMC_A3 | PG3 <-> FMC_A13 |
| PD8  <-> FMC_D13 | PE7  <-> FMC_D4   | PF4  <-> FMC_A4 | PG4 <-> FMC_A14 |
| PD9  <-> FMC_D14 | PE8  <-> FMC_D5   | PF5  <-> FMC_A5 | PG5 <-> FMC_A15 |
| PD10 <-> FMC_D15 | PE9  <-> FMC_D6   | PF12 <-> FMC_A6 | PG9 <-> FMC_NE2 |
| PD11 <-> FMC_A16 | PE10 <-> FMC_D7   | PF13 <-> FMC_A7 |-----------------+
| PD12 <-> FMC_A17 | PE11 <-> FMC_D8   | PF14 <-> FMC_A8 |
| PD13 <-> FMC_A18 | PE12 <-> FMC_D9   | PF15 <-> FMC_A9 |
| PD14 <-> FMC_D0  | PE13 <-> FMC_D10  |-----------------+
| PD15 <-> FMC_D1  | PE14 <-> FMC_D11  |
|                  | PE15 <-> FMC_D12  |
+------------------+------------------+
*/
   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
//  RCC->AHB1ENR   |= 0x00000078;
//  
//  /* Connect PDx pins to FMC Alternate function */
//  GPIOD->AFR[0]  = 0x00cc00cc;
//  GPIOD->AFR[1]  = 0xcccccccc;
//  /* Configure PDx pins in Alternate function mode */  
//  GPIOD->MODER   = 0xaaaa0a0a;
//  /* Configure PDx pins speed to 100 MHz */  
//  GPIOD->OSPEEDR = 0xffff0f0f;
//  /* Configure PDx pins Output type to push-pull */  
//  GPIOD->OTYPER  = 0x00000000;
//  /* No pull-up, pull-down for PDx pins */
//  GPIOD->PUPDR   = 0x00000000;

//  /* Connect PEx pins to FMC Alternate function */
//  GPIOE->AFR[0]  = 0xcccccccc;
//  GPIOE->AFR[1]  = 0xcccccccc;
//  /* Configure PEx pins in Alternate function mode */
//  GPIOE->MODER   = 0xaaaaaaaa;
//  /* Configure PEx pins speed to 100 MHz */
//  GPIOE->OSPEEDR = 0xffffffff;
//  /* Configure PEx pins Output type to push-pull */  
//  GPIOE->OTYPER  = 0x00000000;
//  /* No pull-up, pull-down for PEx pins */
//  GPIOE->PUPDR   = 0x00000000;

//  /* Connect PFx pins to FMC Alternate function */
//  GPIOF->AFR[0]  = 0x00cccccc;
//  GPIOF->AFR[1]  = 0xcccc0000;
//  /* Configure PFx pins in Alternate function mode */   
//  GPIOF->MODER   = 0xaa000aaa;
//  /* Configure PFx pins speed to 100 MHz */
//  GPIOF->OSPEEDR = 0xff000fff;
//  /* Configure PFx pins Output type to push-pull */  
//  GPIOF->OTYPER  = 0x00000000;
//  /* No pull-up, pull-down for PFx pins */
//  GPIOF->PUPDR   = 0x00000000;

//  /* Connect PGx pins to FMC Alternate function */
//  GPIOG->AFR[0]  = 0x00cccccc;
//  GPIOG->AFR[1]  = 0x000000c0;
//  /* Configure PGx pins in Alternate function mode */
//  GPIOG->MODER   = 0x00080aaa;
//  /* Configure PGx pins speed to 100 MHz */
//  GPIOG->OSPEEDR = 0x000c0fff;
//  /* Configure PGx pins Output type to push-pull */  
//  GPIOG->OTYPER  = 0x00000000;
//  /* No pull-up, pull-down for PGx pins */
//  GPIOG->PUPDR   = 0x00000000;
//  
///*-- FMC Configuration ------------------------------------------------------*/
//  /* Enable the FMC/FSMC interface clock */
//  RCC->AHB3ENR         |= 0x00000001;
//  
//#if defined (STM32F427_437xx) || defined (STM32F429_439xx)
//  /* Configure and enable Bank1_SRAM2 */
//  FMC_Bank1->BTCR[2]  = 0x00001011;
//  FMC_Bank1->BTCR[3]  = 0x00000201;
//  FMC_Bank1E->BWTR[2] = 0x0fffffff;
//#endif /* STM32F427_437xx || STM32F429_439xx */

//#if defined (STM32F40_41xxx)
  /* Configure and enable Bank1_SRAM2 */
//  FSMC_Bank1->BTCR[2]  = 0x00001011;
//  FSMC_Bank1->BTCR[3]  = 0x00000201;
//  FSMC_Bank1E->BWTR[2] = 0x0fffffff;
//        FSMC_Bank1->BTCR[0]=0X00000000;
//        FSMC_Bank1->BTCR[1]=0X00000000;
//        FSMC_Bank1E->BWTR[0]=0X00000000;
//#endif  /* STM32F40_41xxx */


        GPIO_InitTypeDef  GPIO_InitStructure;
        FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
  FSMC_NORSRAMTimingInitTypeDef  readWriteTiming;
       
        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE|RCC_AHB1Periph_GPIOF|RCC_AHB1Periph_GPIOG, ENABLE);//ê1&#196;üPD,PE,PF,PGê±&#214;ó  
  RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC,ENABLE);//ê1&#196;üFSMCê±&#214;ó  
   
       
        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;//PB15 í&#198;íìê&#228;3&#246;,&#191;&#216;&#214;&#198;±31a
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;//&#198;&#213;í¨ê&#228;3&#246;&#196;￡ê&#189;
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//í&#198;íìê&#228;3&#246;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;//100MHz
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//é&#207;à-
  GPIO_Init(GPIOB, &GPIO_InitStructure);//3&#245;ê&#188;&#187;ˉ //PB15 í&#198;íìê&#228;3&#246;,&#191;&#216;&#214;&#198;±31a

        GPIO_InitStructure.GPIO_Pin = (3<<0)|(3<<4)|(0XFF<<8)|GPIO_Pin_7;//PD0,1,4,5,7 NE1,8~15 AF OUT
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//&#184;′ó&#195;ê&#228;3&#246;
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//í&#198;íìê&#228;3&#246;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//é&#207;à-
  GPIO_Init(GPIOD, &GPIO_InitStructure);//3&#245;ê&#188;&#187;ˉ  
       
  GPIO_InitStructure.GPIO_Pin = (3<<0)|(0X1FF<<7);//PE0,1,7~15,AF OUT
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//&#184;′ó&#195;ê&#228;3&#246;
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//í&#198;íìê&#228;3&#246;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//é&#207;à-
  GPIO_Init(GPIOE, &GPIO_InitStructure);//3&#245;ê&#188;&#187;ˉ  
       
        GPIO_InitStructure.GPIO_Pin = (0X3F<<0)|(0XF<<12);         //PF0~5,12~15
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//&#184;′ó&#195;ê&#228;3&#246;
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//í&#198;íìê&#228;3&#246;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//é&#207;à-
  GPIO_Init(GPIOF, &GPIO_InitStructure);//3&#245;ê&#188;&#187;ˉ  

        GPIO_InitStructure.GPIO_Pin =(0X3F<<0);//PG0~5
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;//&#184;′ó&#195;ê&#228;3&#246;
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;//í&#198;íìê&#228;3&#246;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;//100MHz
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//é&#207;à-
  GPIO_Init(GPIOG, &GPIO_InitStructure);//3&#245;ê&#188;&#187;ˉ


  GPIO_PinAFConfig(GPIOD,GPIO_PinSource0,GPIO_AF_FSMC);//PD0,AF12
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource1,GPIO_AF_FSMC);//PD1,AF12
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource4,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource5,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource7,GPIO_AF_FSMC);
        GPIO_PinAFConfig(GPIOD,GPIO_PinSource8,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource9,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource10,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource11,GPIO_AF_FSMC);
        GPIO_PinAFConfig(GPIOD,GPIO_PinSource12,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource13,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource14,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOD,GPIO_PinSource15,GPIO_AF_FSMC);//PD15,AF12

  GPIO_PinAFConfig(GPIOE,GPIO_PinSource0,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource1,GPIO_AF_FSMC);
        GPIO_PinAFConfig(GPIOE,GPIO_PinSource7,GPIO_AF_FSMC);//PE7,AF12
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource8,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource9,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource10,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource11,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource12,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource13,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource14,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOE,GPIO_PinSource15,GPIO_AF_FSMC);//PE15,AF12

  GPIO_PinAFConfig(GPIOF,GPIO_PinSource0,GPIO_AF_FSMC);//PF0,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource1,GPIO_AF_FSMC);//PF1,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource2,GPIO_AF_FSMC);//PF2,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource3,GPIO_AF_FSMC);//PF3,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource4,GPIO_AF_FSMC);//PF4,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource5,GPIO_AF_FSMC);//PF5,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource12,GPIO_AF_FSMC);//PF12,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource13,GPIO_AF_FSMC);//PF13,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource14,GPIO_AF_FSMC);//PF14,AF12
  GPIO_PinAFConfig(GPIOF,GPIO_PinSource15,GPIO_AF_FSMC);//PF15,AF12
       
  GPIO_PinAFConfig(GPIOG,GPIO_PinSource0,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOG,GPIO_PinSource1,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOG,GPIO_PinSource2,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOG,GPIO_PinSource3,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOG,GPIO_PinSource4,GPIO_AF_FSMC);
  GPIO_PinAFConfig(GPIOG,GPIO_PinSource5,GPIO_AF_FSMC);
//  GPIO_PinAFConfig(GPIOG,GPIO_PinSource10,GPIO_AF_FSMC);
       
          
        readWriteTiming.FSMC_AddressSetupTime = 0x00;         //μ&#216;&#214;·&#189;¨á￠ê±&#188;&#228;￡¨ADDSET￡&#169;&#206;a1&#184;&#246;HCLK 1/36M=27ns
  readWriteTiming.FSMC_AddressHoldTime = 0x00;         //μ&#216;&#214;·±￡3&#214;ê±&#188;&#228;￡¨ADDHLD￡&#169;&#196;￡ê&#189;A&#206;′ó&#195;μ&#189;       
  readWriteTiming.FSMC_DataSetupTime = 0x08;                 ////êy&#190;Y±￡3&#214;ê±&#188;&#228;￡¨DATAST￡&#169;&#206;a9&#184;&#246;HCLK 6*9=54ns                  
  readWriteTiming.FSMC_BusTurnAroundDuration = 0x00;
  readWriteTiming.FSMC_CLKDivision = 0x00;
  readWriteTiming.FSMC_DataLatency = 0x00;
  readWriteTiming.FSMC_AccessMode = FSMC_AccessMode_A;         //&#196;￡ê&#189;A
   


  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;//  &#213;aà&#239;&#206;ò&#195;&#199;ê1ó&#195;NE1
  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
  FSMC_NORSRAMInitStructure.FSMC_MemoryType =FSMC_MemoryType_SRAM;// FSMC_MemoryType_SRAM;  //SRAM   
  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;//′&#230;′￠&#198;÷êy&#190;Y&#191;í&#182;è&#206;a16bit  
  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode =FSMC_BurstAccessMode_Disable;// FSMC_BurstAccessMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
        FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait=FSMC_AsynchronousWait_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;   
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;  
  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;        //′&#230;′￠&#198;÷D′ê1&#196;ü
  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;  
  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; // &#182;áD′ê1ó&#195;&#207;àí&#172;μ&#196;ê±Dò
  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;  
  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &readWriteTiming;
  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &readWriteTiming; //&#182;áD′í&#172;&#209;ùê±Dò

  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);  //3&#245;ê&#188;&#187;ˉFSMC&#197;&#228;&#214;&#195;

        FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);  // ê1&#196;üBANK1&#199;&#248;óò1       

/*
  Bank1_SRAM2 is configured as follow:
  In case of FSMC configuration
  NORSRAMTimingStructure.FSMC_AddressSetupTime = 1;
  NORSRAMTimingStructure.FSMC_AddressHoldTime = 0;
  NORSRAMTimingStructure.FSMC_DataSetupTime = 2;
  NORSRAMTimingStructure.FSMC_BusTurnAroundDuration = 0;
  NORSRAMTimingStructure.FSMC_CLKDivision = 0;
  NORSRAMTimingStructure.FSMC_DataLatency = 0;
  NORSRAMTimingStructure.FSMC_AccessMode = FMC_AccessMode_A;

  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &NORSRAMTimingStructure;
  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &NORSRAMTimingStructure;

  In case of FMC configuration   
  NORSRAMTimingStructure.FMC_AddressSetupTime = 1;
  NORSRAMTimingStructure.FMC_AddressHoldTime = 0;
  NORSRAMTimingStructure.FMC_DataSetupTime = 2;
  NORSRAMTimingStructure.FMC_BusTurnAroundDuration = 0;
  NORSRAMTimingStructure.FMC_CLKDivision = 0;
  NORSRAMTimingStructure.FMC_DataLatency = 0;
  NORSRAMTimingStructure.FMC_AccessMode = FMC_AccessMode_A;

  FMC_NORSRAMInitStructure.FMC_Bank = FMC_Bank1_NORSRAM2;
  FMC_NORSRAMInitStructure.FMC_DataAddressMux = FMC_DataAddressMux_Disable;
  FMC_NORSRAMInitStructure.FMC_MemoryType = FMC_MemoryType_SRAM;
  FMC_NORSRAMInitStructure.FMC_MemoryDataWidth = FMC_MemoryDataWidth_16b;
  FMC_NORSRAMInitStructure.FMC_BurstAccessMode = FMC_BurstAccessMode_Disable;
  FMC_NORSRAMInitStructure.FMC_AsynchronousWait = FMC_AsynchronousWait_Disable;  
  FMC_NORSRAMInitStructure.FMC_WaitSignalPolarity = FMC_WaitSignalPolarity_Low;
  FMC_NORSRAMInitStructure.FMC_WrapMode = FMC_WrapMode_Disable;
  FMC_NORSRAMInitStructure.FMC_WaitSignalActive = FMC_WaitSignalActive_BeforeWaitState;
  FMC_NORSRAMInitStructure.FMC_WriteOperation = FMC_WriteOperation_Enable;
  FMC_NORSRAMInitStructure.FMC_WaitSignal = FMC_WaitSignal_Disable;
  FMC_NORSRAMInitStructure.FMC_ExtendedMode = FMC_ExtendedMode_Disable;
  FMC_NORSRAMInitStructure.FMC_WriteBurst = FMC_WriteBurst_Disable;
  FMC_NORSRAMInitStructure.FMC_ContinousClock = FMC_CClock_SyncOnly;
  FMC_NORSRAMInitStructure.FMC_ReadWriteTimingStruct = &NORSRAMTimingStructure;
  FMC_NORSRAMInitStructure.FMC_WriteTimingStruct = &NORSRAMTimingStructure;
*/
  
}[/mw_shl_code]
SRAM配置 SRAM配置
软件按照教程配置的



后面调试发现加入SRAM后时钟频率全部变成了168M
加入SRAM 加入SRAM

下图是没加入SRAM的时钟频率正常
未加SRAM 未加SRAM

找不到原因出在哪里，前来求助


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2条回答
peng1554
1楼-- · 2019-07-20 05:46
帮顶！！
正点原子
2楼-- · 2019-07-20 09:37
 精彩回答 2  元偷偷看……

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