STM32F4在UDP发送大于1K数据时,对方无法接收到

2019-07-21 00:32发布

芯片是STM32F407,ETH的驱动是参考原子的例程,中断方式,扫描方式都可以正常工作,
UDP在发送1K左右数据时,能够正常工作,但目前要上传128K的日志数据,为了提高速度,就把数据包增大到了2K,
(其实是想直接32K一个包的,UDP的数据包最大长度是64K-1),但是发现2K的数据包发不出来,用socket调试工具软件接收不到,
但用socket调试工具软件建立两个udp客户端互联,是可以正常收发大于2K的数据包的。

以下是UDP最后分包发送的函数,看了一下,应该没啥问题,我对于大于MTU(1500)的UDP数据包的建立,不是很清楚,我是要组装两个UDP frame呢,还是要怎么整~
[mw_shl_code=c,true]/** * @brief Prepares DMA Tx descriptors to transmit an ethernet frame * @param FrameLength : length of the frame to send * @retval error status */ uint32_t ETH_Prepare_Transmit_Descriptors(u16 FrameLength) { uint32_t buf_count =0, size=0,i=0; __IO ETH_DMADESCTypeDef *DMATxNextDesc; /* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */ if((DMATxDescToSet->Status & ETH_DMATxDesc_OWN) != (u32)RESET) { /* Return ERROR: OWN bit set */ return ETH_ERROR; } DMATxNextDesc = DMATxDescToSet; if (FrameLength > ETH_TX_BUF_SIZE) { buf_count = FrameLength/ETH_TX_BUF_SIZE; if (FrameLength%ETH_TX_BUF_SIZE) buf_count++; } else buf_count =1; if (buf_count ==1) { /*set LAST and FIRST segment */ DMATxDescToSet->Status |=ETH_DMATxDesc_FS|ETH_DMATxDesc_LS; /* Set frame size */ DMATxDescToSet->ControlBufferSize = (FrameLength& ETH_DMATxDesc_TBS1); /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */ DMATxDescToSet->Status |= ETH_DMATxDesc_OWN; DMATxDescToSet= (ETH_DMADESCTypeDef *)(DMATxDescToSet->Buffer2NextDescAddr); } else { for (i=0; i< buf_count; i++) { if (i==0) { /* Setting the first segment bit */ DMATxDescToSet->Status |= ETH_DMATxDesc_FS; } /* Program size */ DMATxNextDesc->ControlBufferSize = (ETH_TX_BUF_SIZE & ETH_DMATxDesc_TBS1); if (i== (buf_count-1)) { /* Setting the last segment bit */ DMATxNextDesc->Status |= ETH_DMATxDesc_LS; size = FrameLength - (buf_count-1)*ETH_TX_BUF_SIZE; DMATxNextDesc->ControlBufferSize = (size & ETH_DMATxDesc_TBS1); } /*give back descriptor to DMA */ DMATxNextDesc->Status |= ETH_DMATxDesc_OWN; DMATxNextDesc = (ETH_DMADESCTypeDef *)(DMATxNextDesc->Buffer2NextDescAddr); /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */ } DMATxDescToSet = DMATxNextDesc ; } /* When Tx Buffer unavailable flag is set: clear it and resume transmission */ if ((ETH->DMASR & ETH_DMASR_TBUS) != (u32)RESET) { /* Clear TBUS ETHERNET DMA flag */ ETH->DMASR = ETH_DMASR_TBUS; /* Resume DMA transmission*/ ETH->DMATPDR = 0; } /* Return SUCCESS */ return ETH_SUCCESS; }[/mw_shl_code]
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