ARM?Cortex-M4 32b MCU+FPU, up to 256KB Flash+48KB SRAM 4 ADCs, 2 DAC ch., 7 comp., 4 PGA, timers, 2.0-3.6 V operation Datasheet ? preliminary data Features ■ ARM 32-bit Cortex?-M4 CPU (72 MHz max),  single-cycle multiplication and HW division, DSP  instruction with FPU (floating-point unit) and MPU  (memory protection unit). ■ Operating conditions: – VDD, VDDA voltage range: 2.0 V to 3.6 V ■ Memories – 128 to 256 Kbytes of Flash memory – Up to 40 Kbytes of SRAM on data bus with  HW parity check – 8 Kbytes of SRAM on instruction bus with HW  parity check (CCM) ■ Clock management – 4 to 32 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – Internal 8 MHz RC with x 16 PLL option – Internal 40 kHz oscillator  ■ Calendar RTC – Alarm, periodic wakeup from Stop/Standby ■ Reset and supply management – Power-on/Power down reset (POR/PDR) – Programmable voltage detector (PVD) ■ Low power Sleep, Stop, and Standby modes ■ VBAT  supply for RTC and backup registers ■ Debug mode: serial wire debug (SWD), JTAG  interfaces, Cortex-M4 ETM ■ DMA – 12-channel DMA controller – Peripherals supported: timers, ADCs, SPIs,  I 2 Cs, USARTs and DACs ■ Up to 4 × ADC 0.20 ?S (up to 39 channels) with  selectable resolution of 12/10/8/6 bits, 0 to 3.6 V  conversion range, separate analog supply from 2  to 3.6 V ■ Temperature sensor ■ 7 fast rail-to-rail analog comparators ■ Up to 2 x 12-bit DAC channels ■ Up to 4 operational amplifiers that can be used in  PGA mode, all terminal accessible           ■ Support for up to 24 capacitive sensing keys ■ Up to 87 fast I/O ports, all mappable on external  interrupt vectors, several 5 V-tolerant ■ Up to 13 timers – 1 x 32-bit timer and 2 x 16-bit timers with up  to 4 IC/OC/PWM or pulse counter and  quadrature (incremental) encoder input – Up to 2 x 16-bit 6-channel advanced-control  timers, with up to 6 PWM channels, deadtime  generation and emergency stop – 1 x 16-bit timer with 2 IC/OCs, 1 OCN/PWM,  deadtime generation and emergency stop – 2 x 16-bit timers with IC/OC/OCN/PWM,  deadtime generation and emergency stop – 2 x watchdog timers (independent, window) – 1 x SysTick timer: 24-bit downcounter – Up to 2 x 16-bit basic timers to drive the DAC ■ Communication interfaces – CAN interface (2.0B Active) – USB 2.0 full speed interface – 2 x I2C with 20 mA current sink to support  Fast mode plus – Up to 5 USART/UARTs (ISO 7816 interface,  LIN, IrDA, modem control) – Up to 3 SPIs, 2 with muxed full-duplex I2S to  achieve audio class accuracy via external  PLL ■ CRC calculation unit, 96-bit unique ID