说明没有进入掉电模式，寄存器配置有问题吧

寄存器是按DS配置的，而且用所有值都试了一遍，没有比2.5mA更小的，最大的有7mA。
现在搞不清楚是用的不对，还是DS中这个指标水分太大？

数据手册里面一般是理想情况，实际使用中可能会有偏差，但是偏差不会这么大，
所以还应该是你自身程序问题

问题找到了，没有注意到这些：

 

JTAG Interface and
On-chip Debug System
If the On-chip debug system is enabled by the OCDEN Fuse and the chip enter Power
down or Power save sleep mode, the main clock source remains enabled. In these
sleep modes, this will contribute significantly to the total current consumption. There are
three alternative ways to avoid this:
• Disable OCDEN Fuse.
• Disable JTAGEN Fuse.
• Write one to the JTD bit in MCUCSR.
The TDO pin is left floating when the JTAG interface is enabled while the JTAG TAP
controller is not shifting data. If the hardware connected to the TDO pin does not pull up
the logic level, power consumption will increase. Note that the TDI pin for the next
device in the scan chain contains a pull-up that avoids this problem. Writing the JTD bit
in the MCUCSR register to one or leaving the JTAG fuse unprogrammed disables the
JTAG interface.