欢迎加入：2015年及以后毕业实习生招聘开始啦！-第3页回答

欢迎加入：2015年及以后毕业实习生招聘开始啦！

2019-08-05 17:08发布

欢迎加入：2015年及以后毕业实习生招聘开始啦！

2015年及以后毕业实习生岗位：

1. Bench Validation Engineer (TI Beijing R&D Center)
http://my.yingjiesheng.com/job_363627.html

BASIC / KEY Qualifications:

· Require a BSEE degree or above with related experience at IC test field
· Strong skills of handling electronics measurement instruments
· Hardware development experience is a plus
· Lab automation experience is a plus (LabVIEW)
Responsibilities:
· Work out product bench validation plan at early phase of new product development
· Evaluate test solution and review with core team
· Develop test HW (considering test methodology and automation capability)
· Develop test software (Lab automation)
· First silicon 24Hrs wake-up test and 30 days full validation
· Support ATE/Application correlation test
· Collect characterization data over different test conditions

Requirements:
· Good understanding of the IC test methodology.
· Be familiar with some basic lab equipment (digital multi-meter, oscilloscope, source meter, power supply)
· Good written and verbal English (CET-4 at least)
· Good communication skills with cross functions and team work
· Good planning and documentation sense.
· Be flexible to support some work from other functions.
· Be flexible to travel (domestic and international)

2. Digital IC Design Intern (TI Beijing R&D Center)
http://my.yingjiesheng.com/job_363626.html

Requirements
1. Candidate must possess or be pursuing a Master’s degree in EE.
2. Graduation date of Fall 2014 or later
3. Understand VLSI design
3. Skilled at Hardware Description Language, Verilog/SystemVerilog/VHDL
4. Familiar with modern digital design flow
4. Self-motivated and good communication skills
5. Good written and verbal English

Responsibility
1. Verification
--Develop verification test bench with System Verilog/Verilog to improve test coverage
--Modify and reuse existing IP
--Improve existing verification/simulation environment
2. RTL design
--Fix and modify existing design using Verilog
3. Technical writing
--Update design spec
--Generate reports of test results
4. Communication
--Effective communication with team in China and US

了解详情请点击→http://www.deyisupport.com/blog/b/tihire/archive/2014/03/10/51635.aspx

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