/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source, SYSCLK = 72 MHz*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* HCLK = SYSCLK/1 = 72 MHz */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
给你一个参考,自己写的
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON); 选择外部时钟
/* Wait till HSE is ready */
while(RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET)
{
}
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* PLLCLK = (HSE/1)*9 = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source, SYSCLK = 72 MHz*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* HCLK = SYSCLK/1 = 72 MHz */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK/1 = 72 MHz*/
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 = 36 MHz*/
RCC_PCLK1Config(RCC_HCLK_Div2);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
}
/* Enable PWR and BKP clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP , ENABLE);
/* Enable GPIOA ,GPIOB,GPIOC,GPIOD and USART1 SPI2 clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB| RCC_APB2Periph_GPIOC| RCC_APB2Periph_GPIOD| RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO| RCC_APB2Periph_GPIOC | RCC_APB2Periph_USART1, ENABLE);
/* Enable peripheral clocks --------------------------------------------------*/
/* Enable I2C1 and I2C2 clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1 | RCC_APB1Periph_I2C2 | RCC_APB1Periph_SPI2 | RCC_APB1Periph_USART2, ENABLE);
/* TIM1 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4 , ENABLE);
/* TIM2 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
}
一周热门 更多>