在用modelsim做后仿真时总是提示：Error: (vsim-3063) D:/altera/91/quartus/count4/simulation/modelsim/count4_tp.v(6): Port 'out' not found in the connected module (3rd connection).检查程序都编译通过的呀，怎么连接呢？
module count4_tp;
  reg  clk,reset;
  wire[3:0] out;
  parameter DELY=100;
  
  count4 mycount(.clk(clk),.reset(reset),.out(out));
  
  always #(DELY/2) clk=~clk;
  initial
  begin
       clk=0;
       reset=0;
  #DELY reset=1;
  #DELY reset=0;
  #(DELY*20) $finish;
  end
  
  initial $monitor($time,,,"clk=#d reset=#d out=#d",clk,reset,out);
endmodule
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