void TIM4_Catch_Init(u16 arr,u16 psc)
{
GPIO_InitTypeDef GPIO_InitStruct;
TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStruct;
TIM_ICInitTypeDef TIM4_ICInitStruct;
NVIC_InitTypeDef NVIC_InitStruct;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4,ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB|RCC_APB2Periph_AFIO,ENABLE);
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPD;
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_7;
GPIO_Init(GPIOB,&GPIO_InitStruct);
GPIO_ResetBits(GPIOB,GPIO_Pin_7);
TIM_TimeBaseInitStruct.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInitStruct.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInitStruct.TIM_Period = arr;
TIM_TimeBaseInitStruct.TIM_Prescaler = psc;
TIM_TimeBaseInit(TIM4,&TIM_TimeBaseInitStruct);
TIM4_ICInitStruct.TIM_Channel = TIM_Channel_2;
TIM4_ICInitStruct.TIM_ICSelection =TIM_ICSelection_DirectTI;
TIM4_ICInitStruct.TIM_ICPrescaler = TIM_ICPSC_DIV1;
TIM4_ICInitStruct.TIM_ICFilter = TIM_ICPolarity_Rising;
TIM4_ICInitStruct.TIM_ICPolarity = 0x00;
TIM_ICInit(TIM4,&TIM4_ICInitStruct);
NVIC_InitStruct.NVIC_IRQChannel = TIM4_IRQn;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
NVIC_Init(&NVIC_InitStruct);
TIM_ITConfig(TIM4,TIM_IT_Update|TIM_IT_CC2,ENABLE);
TIM_Cmd(TIM4,ENABLE );
}
u8 TIM4CH4_CAPTURE_STA = 0;
u16 TIM4CH4_CAPTURE_VAL;
void TIM4_IRQHandler(void)
{
if((TIM4CH4_CAPTURE_STA&0x80)==0)
{
if(TIM_GetITStatus(TIM4,TIM_IT_Update) != RESET)
{
if(TIM4CH4_CAPTURE_STA & 0x40)
{
if((TIM4CH4_CAPTURE_STA & 0x3F) == 0x3F)
{
TIM4CH4_CAPTURE_STA |= 0x80;
TIM4CH4_CAPTURE_VAL = 0xFFFF;
}
else
TIM4CH4_CAPTURE_STA ++;
}
}
}
if(TIM_GetITStatus(TIM4,TIM_IT_CC2) != RESET)
{
if(TIM4CH4_CAPTURE_STA & 0x40)
{
TIM4CH4_CAPTURE_STA |= 0x80;
TIM4CH4_CAPTURE_VAL = TIM_GetCapture2(TIM4);
TIM_OC1PolarityConfig(TIM4,TIM_ICPolarity_Rising);
}
else
{
TIM4CH4_CAPTURE_STA = 0;
TIM4CH4_CAPTURE_VAL = 0;
TIM_SetCounter(TIM4,0);
TIM4CH4_CAPTURE_STA |= 0x40;
TIM_OC1PolarityConfig(TIM4,TIM_ICPolarity_Falling);
}
}
TIM_ClearITPendingBit(TIM4,TIM_IT_CC2|TIM_IT_Update);
}
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