XILINX芯片在place时，报以下错误ERROR:Place:1138 - Automatic clock placement failed. Please attempt to analyze the global clocking required for this
   design and either lock the clock placement or area locate the logic driven by the clocks so that the clocks may be
   placed in such a way that all logic driven by them may be routed. The main restriction on clock placement is that
   only one clock output signal for any competing Global / Side pair of clocks may enter any region. For further
   information see the "Quadrant Clock Routing" section in the Spartan3e Family Datasheet.
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