本帖最后由 FSL_TICS_Robin 于 2014-8-8 16:21 编辑
以下分别的KEIL MDK 5.11A 和 IAR 7.20.2.7431的 MK22D5.h文件
路径:
MDK:C:Keil_v5ARMPackKeilKinetis_K20_DFP1.1.0DeviceInclude
IAR:C:Program FilesIAR SystemsEmbedded Workbench 7.0armincFreescale
MDK:
** ###################################################################
** Compilers: ARM Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
**
** Reference manual: K22RM, Rev.4, Feb 2013
** Version: rev. 1.4, 2013-01-24
**
** Abstract:
** CMSIS Peripheral Access Layer for MK22D5
**
** Copyright: 1997 - 2013 Freescale, Inc. All Rights Reserved.
**
** http:
www.freescale.com
** mail:
support@freescale.com
**
** Revisions:
** - rev. 1.0 (2012-06-06)
** Initial public version.
** - rev. 1.1 (2012-07-31)
** Fixed address of SIM_SDID register.
** - rev. 1.2 (2012-08-29)
** Update to Rev. 3 of reference manual.
** Updated UART0, RTC and CRC register definition.
** - rev. 1.3 (2012-10-11)
** PDB module update - PDB0_PO1DLY register added.
** - rev. 1.4 (2013-01-24)
** Update to Rev. 4 of reference manual.
**
** ###################################################################
IAR:
** ###################################################################
** Compilers: ARM Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
**
** Reference manual: K22RM, Rev.4, Feb 2013
** Version: rev. 1.6, 2013-06-24
**
** Abstract:
** This header file implements peripheral memory map for MK22D5
** processor.
**
** Copyright: 1997 - 2013 Freescale, Inc. All Rights Reserved.
**
** http:
www.freescale.com
** mail:
support@freescale.com
**
** Revisions:
** - rev. 1.0 (2012-06-06)
** Initial public version.
** - rev. 1.1 (2012-07-31)
** Fixed address of SIM_SDID register.
** - rev. 1.2 (2012-08-29)
** Update to Rev. 3 of reference manual.
** Updated UART0, RTC and CRC register definition.
** - rev. 1.3 (2012-10-11)
** PDB module update - PDB0_PO1DLY register added.
** - rev. 1.4 (2013-01-24)
** Update to Rev. 4 of reference manual.
** ETB registers removed.
** - rev. 1.5 (2013-04-05)
** Changed start of doxygen comment.
** - rev. 1.6 (2013-06-24)
** NV_FOPT register - NMI_DIS bit added.
**
** ###################################################################
MDK:
/* CRC - Peripheral instance base addresses */
/** Peripheral CRC base address */
#define CRC_BASE (0x40032000u)
/** Peripheral CRC base pointer */
#define CRC0 ((CRC_Type *)CRC_BASE)
/** Array initializer of CRC peripheral base pointers */
#define CRC_BASES { CRC0 }
IAR:
/* CRC - Peripheral instance base addresses */
/** Peripheral CRC base pointer */
#define CRC_BASE_PTR ((CRC_MemMapPtr)0x40032000u)
/** Array initializer of CRC peripheral base pointers */
#define CRC_BASE_PTRS { CRC_BASE_PTR }
无语了~~~~~~~~~~~~~~~~~~~~
难道就是没有统一的库造成的?
** ###################################################################
** Processor: MK64FN1M0VMD12
** Compilers: ARM Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
**
** Reference manual: K64P144M120SF5RM, Rev.1, July 2013
** Version: rev. 1.0, 2013-08-12
**
** Abstract:
** CMSIS Peripheral Access Layer for MK64F12
**
** Copyright: 1997 - 2013 Freescale, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** Revisions:
** - rev. 1.0 (2013-08-12)
** Initial version.
**
** ###################################################################
/* CRC - Peripheral instance base addresses */
/** Peripheral CRC base address */
#define CRC_BASE (0x40032000u)
/** Peripheral CRC base pointer */
#define CRC0 ((CRC_Type *)CRC_BASE)
/** Array initializer of CRC peripheral base pointers */
#define CRC_BASES { CRC0 }
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